N74F157AD,623 NXP

INTEGRATED CIRCUITS 74F157A, 74F158A Data selectors/multiplexers Product specification 2000 Jun 30 Supersedes data of 1996 Mar 12 IC15 Data Handbook Philips Semiconductors Product specification Data selectors/multiplexers 74F157A, 74F158A 74F157A: Quad 2-input data selector/multiplexer, non-inverting 74F158A: Quad 2-input data selector/multiplexer, inverting DESCRIPTION Industrial temperature range (10C to +85C) available for The 74F157A is a high speed Quad 2-Input Multiplexer which 74F157A selects 4 bits of data from one of two sources under the control of a common Select input (S). The Enable input (E) is active when Low. TYPICAL TYPICAL When E is High, all of the outputs (Yn) are forced Low regardless of TYPE PROPAGATION SUPPLY CURRENT all other input conditions. DELAY (TOTAL) Moving data from two registers to a common output bus is a 74F157A 4.6ns 15mA common use of the 74F157A. The state of the Select input 74F158A 3.7ns 10mA determines the particular register from which the data comes. The device is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The 74F158A is similar, but has inverting outputs (Yn). ORDERING INFORMATION ORDER CODE DESCRIPTION PKG. DWG. COMMERCIAL RANGE INDUSTRIAL RANGE V = 5V 10%, T = 0C to +70C V = 5V 10%, T = 40C to +85C CC amb CC amb 16-pin plastic DIP N74F157AN, N174F158AN I74F157AN SOT38-4 16-pin plastic SO N74F157AD, N74F158AD I74F157AD SOT109-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Ina, Inb, Inc, Ind Data inputs 1.0/1.0 20A/0.6mA S Select input 1.0/1.0 20A/0.6mA E Enable input 1.0/1.0 20A/0.6mA YaYd Data outputs (74F157A) 50/33 1.0mA/20mA YaYd Data outputs (74F158A) 50/33 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20A in the High state and 0.6mA in the Low state. PIN CONFIGURATIONS, 74F157A 74F158A S 1 16 S 1 16 V V CC CC I0a 2 15 E I0a 2 15 E I1a 3 14 I0d I1a 3 14 I0d Ya 4 13 I1d Ya 4 13 I1d I0b 5 12 Yd I0b 5 12 Yd I1b 6 11 I0c I1b 6 11 I0c Yb 7 10 I1c Yb 7 10 I1c GND 8 9 Yc GND 8 9 Yc SF00216 SF00215 LOGIC SYMBOLS, 74F157A 74F158A 2356 11 10 14 13 2356 11 10 14 13 I0a I1a I0b I1b I0c I1c I0d I1d I0a I1a I0b I1b I0c I1c I0d I1d 1 S 1 S 15 E 15 E Ya Yb Yc Yd Ya Yb Yc Yd V = Pin 16 V = Pin 16 CC CC 479 12 479 12 GND = Pin 8 GND = Pin 8 SF00217 SF00218 2 2000 Jun 30 853-0346 24024