Vision and sensor fusion applications S32V234 Processor for Advanced Driver Assistance Targeted for ASIL B/C ADAS applications, the high-performance S32V234 automotive processor supports secure, computation-intensive vision and sensor fusion applications. TARGET APPLICATIONS ENABLEMENT TOOLS Front camera advanced driver assistance systems (ADAS), SBC-S32V234 evaluation board (EVB) including applications such as pedestrian detection, object S32V234 EVB detection, lane departure warning, smart head beam control and traffic sign recognition BlueBox autonomous vehicle platform S32VLS2-RDB Surround view applications where the image data can be S32V234 Vision-based camera options received in encoded form (MJPEG or H.264) via Ethernet or in raw formats via the MIPI-CSI2 or VIU interfaces MXOV10635-S32V Smart rearview camera applications MAX9286S32V234 Sensor fusion computing in communication OV10640CSP-S32V, S32V- SONYCAM with a radar MCU AUTOSAR OS and MCAL Designed and manufactured to our proven automotive S32 Design Studio IDE with integrated vision SDK practices, and with embedded Crypto Security Engine (CSE), the S32V234 MPU satisfies developers needs for Strong third-party support safety, security and reliability. Simulation and early code development solutions availableS32V234 MCU FAMILY Key Features Benefits Designed and manufactured to satisfy automotive reliability Enables adherence to ISO 26262 ASIL B standard for automotive safety applications and ISO 26262 ASIL B/C functional safety requirements Quad 1 GHz Arm Cortex -A53 core + Arm NEON 9.2 K DMIPS processing horsepower (without acceleration) for management of ADAS tasks core platform Arm Cortex-M4 core at 133 MHz for I/O control and Enables automotive OS such as AUTOSAR to control interfaces to external devices without impacting AUTOSAR OS Cortex-A53 performance Embedded security Security engine together with Arm TrustZone technology provides protection against IP theft and malicious hacking Dual APEX-2 image processing engine Allows high-performance, low-power processing of incoming image data Image signal processor Performs image housekeeping tasks such as HDR and color conversion, plus some dedicated image processing tasks 3-D graphics processing unit (GPU) For rendering 3-D images may also be used for additional image analysis tasks Video input: dual MIPI-SCI dual video input unit (VIU) Supports mono, stereo and surround view camera inputs H.264 decode and encode also supported Memory interfaces DRAM support for LPDDR2/DDR3L/DDR3 for high-bandwidth data access, plus dual QuadSPI for external flash The S32V234 is part of our SafeAssure program and designed specifically to address ISO 26262 ASIL B/C functional safety requirements. S32V234 BLOCK DIAGRAM S32V234 BLOCK DIAGRAM S32V234 BLOCK DIAGRAM Vision Platform Image Processing Platform CPU Platform Vision Platform Gfx & Display Image Processing Platform CPU Platform Image Cognition Proc. Dual Camera Interfaces Gfx & Display ARM Cortex-A53 ARM Cortex-A53 3D GPU Image Cognition Proc. Dual Camera Interfaces ARM Cortex-A53 ARM Cortex-A53 2 x MIPI CSI2 3D GPU Image Cognition Proc. ARM Cortex -A53 ARM Cortex-A53 2 x MIPI CSI2 DCU 18/24 bits RGB Image Cognition Proc. ARM Cortex -A53 ARM Cortex-A53 2 x Parallel 16-bit L-mem L-mem 32 KB I-cache 32 KB D-cache 32 KB I-cache 32 KB D-cache DCU 18/24 bits RGB I-Cache 2 x Parallel 16-bit L-mem L-mem 32 KB I-cacheI-Cache32 KB D-cacheD-Cache 32 KB I-cache 32 KB D-cacheD-Cache Video Codec H.264 4 way 2 way 4 way 2 way D-Cache I-Cache 32 CU 32 CU I-Cache D-Cache Image Signal Processing Video Codec H.264 2 way 4 way 2 way 4 way 32 CU 32 CU 8-12 bits Encoder TM Image Signal Processing ARM NEON NEON HDR 8-12 bits Encoder Sequencer DMA TM ARM NEON NEON Color Conversion HDR 8-12 bit Decoder Sequencer DMA Tone Mapping Color Conversion Cortex-M4 SCU L2 Cache512 KB + ECC APEX2CL 8-12 bit DecoderJPEG/H.264 Tone Mapping Cortex-M4 SCU L2 Cache512 KB + ECC APEX2CL JPEG/H.264 Internal Memory Security Fabric System Control Internal Memory Security Fabric System Control and Support 4 MB RAM with ECC CSE + Flashless ARM AMBA AXI3/ACE Interconnect 128-bit with MPU and Support 4 MB RAM with ECC CSE + Flashless ARM AMBA AXI3/ACE Interconnect 128-bit with MPU FCCU and M/L BIST Ext. Memory I/F Connectivity Zipwire FCCU and M/L BIST Ext. Memory I/F Connectivity DDR Ctrl + ECC T-Sensor Zipwire DDR Ctrl + ECC T-Sensor 2 x CAN-FD 64 Msg Dual Ch. FlexRay 128 MSG. Gigabit Ethernet Control DDR Quad SPI CRC Computing 2 x CAN-FD 64 Msg Gigabit Ethernet Control Dual Ch. FlexRay 128 MSG. DDR Quad SPI 2 CRC Computing 5 Gbit/s PCle 1 lane 2 x LinFlex Ctrl & 3 x I C 4 x dSPI (4 cs) Safe DMA External Memory 2 5 Gbit/s PCle 1 lane 2 x LinFlex Ctrl & 3 x I C 4 x dSPI (4 cs) Safe DMA External Memory LP-DDR2/DDR3 2 x eTimers 2 x SAR ADC 12 bits 1 Ms/s 1 x SD-HC DEBUG and Trace Unit LP-DDR2/DDR3 2 x eTimers 2 x SAR ADC 12 bits 1 Ms/s 1 x SD-HC DEBUG and Trace Unit Optional Optional SafeAssure PROGRAM Functional safety. Simplified. Our SafeAssure functional safety program is designed to help system manufacturers more easily achieve system compliance with International Standards Organization (ISO) 26262 and International Electrotechnical Commission (IEC) 61508 functional safety standards. The program highlights our solutionshardware and softwarethat are optimally designed to support functional safety implementations and come with a rich set of enablement collateral. For more information, visit www.nxp.com/SafeAssure. www.nxp.com NXP, the NXP logo and the SafeAssure logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. Arm, Cortex and TrustZone are registered trademarks of Arm Limited (or its subsidiaries) in the EU and/or elsewhere. NEON is a trademark of Arm Limited (or its subsidiaries) in the EU and/or elsewhere. 2017 NXP B.V. Document Number: S32V234FS REV 3