INTEGRATED CIRCUITS
80C31/80C32
80C51 8-bit microcontroller family
128/256 byte RAM ROMless low voltage (2.7 V5.5 V),
low power, high speed (33 MHz)
Product specification 2000 Aug 07
IC28 Data Handbook
Philips Semiconductors Product specification
80C51 8-bit microcontroller family
80C31/80C32
128/256 byte RAM ROMless low voltage (2.7V5.5V),
low power, high speed (33 MHz)
DESCRIPTION FEATURES
The Philips 80C31/32 is a high-performance static 80C51 design
8051 Central Processing Unit
fabricated with Philips high-density CMOS technology with operation
128 8 RAM (80C31)
from 2.7 V to 5.5 V.
256 8 RAM (80C32)
The 80C31/32 ROMless devices contain a 128 8 RAM/256 8
Three 16-bit counter/timers
RAM, 32 I/O lines, three 16-bit counter/timers, a six-source,
Boolean processor
four-priority level nested interrupt structure, a serial I/O port for
either multi-processor communications, I/O expansion or full duplex
Full static operation
UART, and on-chip oscillator and clock circuits.
Low voltage (2.7 V to 5.5 V@ 16 MHz) operation
In addition, the device is a low power static design which offers a
Memory addressing capability
wide range of operating frequencies down to zero. Two software
64k ROM and 64k RAM
selectable modes of power reductionidle mode and power-down
mode are available. The idle mode freezes the CPU while allowing
Power control modes:
the RAM, timers, serial port, and interrupt system to continue
Clock can be stopped and resumed
functioning. The power-down mode saves the RAM contents but
Idle mode
freezes the oscillator, causing all other chip functions to be
Power-down mode
inoperative. Since the design is static, the clock can be stopped
without loss of user data and then the execution resumed from the
CMOS and TTL compatible
point the clock was stopped.
TWO speed ranges at V = 5 V
CC
0 to 16 MHz
SELECTION TABLE
For applications requiring more ROM and RAM, see the 8XC54/58
0 to 33 MHz
and 8XC51RA+/RB+/RC+/80C51RA+ data sheet.
Three package styles
ROM/EPROM RAM Size Programmable Hardware
Extended temperature ranges
Memory Size (X by 8) Timer Counter Watch Dog
(X by 8) (PCA) Timer Dual Data Pointers
80C31/8XC51 4 level priority interrupt
0K/4K 128 No No
6 interrupt sources
80C32/8XC52/54/58
Four 8-bit I/O ports
0K/8K/16K/32K 256 No No
Fullduplex enhanced UART
Framing error detection
80C51RA+/8XC51RA+/RB+/RC+
Automatic address recognition
0K/8K/16K/32K 512 Yes Yes
Programmable clock out
8XC51RD+
Asynchronous port reset
64K 1024 Yes Yes
Low EMI (inhibit ALE)
Wake-up from Power Down by an external interrupt
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