P80C592FFA NXP

INTEGRATED CIRCUITS DATA SHEET P8xC592 8-bit microcontroller with on-chip CAN 1996 Jun 27 Product specication Supersedes data of January 1995 File under Integrated Circuits, IC18Philips Semiconductors Product specication 8-bit microcontroller with on-chip CAN P8xC592 CONTENTS 14 INTERRUPT SYSTEM 14.1 Interrupt Enable and Priority Registers 1 FEATURES 14.2 Interrupt Vectors 2 GENERAL DESCRIPTION 14.3 Interrupt Priority 3 ORDERING INFORMATION 15 POWER REDUCTION MODES 4 BLOCK DIAGRAM 15.1 Power Control Register (PCON) 15.2 CAN Sleep Mode 5 PINNING 15.3 Idle Mode 6 FUNCTIONAL DESCRIPTION 15.4 Power-down Mode 7 MEMORY ORGANIZATION 16 OSCILLATOR CIRCUITRY 7.1 Program Memory 17 RESET CIRCUITRY 7.2 Internal Data Memory 17.1 Power-on Reset 7.3 External Data Memory 18 INSTRUCTION SET 8 I/O PORT STRUCTURE 18.1 Addressing Modes 9 PULSE WIDTH MODULATED OUTPUTS 18.2 Instruction Set (PWM) 19 ABSOLUTE MAXIMUM RATINGS (note 1) 9.1 Prescaler frequency control register (PWMP) 9.2 Pulse Width Register 0 (PWM0) 20 DC CHARACTERISTICS 9.3 Pulse Width Register 1 (PWM1) 21 AC CHARACTERISTICS 10 ANALOG-TO-DIGITAL CONVERTER (ADC) 22 CAN APPLICATION INFORMATION 10.1 ADC Control register (ADCON) 22.1 Latency time requirements 11 TIMERS/COUNTERS 22.2 Connecting a P8xC592 to a bus line (physical layer) 11.1 Timer 0 and Timer 1 11.2 Timer T2 Capture and Compare Logic 23 PACKAGE OUTLINES 11.3 Watchdog Timer (T3) 24 SOLDERING 12 SERIAL I/O PORT: SIO0 (UART) 24.1 Introduction 13 SERIAL I/O PORT: SIO1 (CAN) 24.2 Reflow soldering 24.3 Wave soldering 13.1 On-chip CAN-controller 24.4 Repairing soldered joints 13.2 CAN Features 13.3 Interface between CPU and CAN 25 DEFINITIONS 13.4 Hardware blocks of the CAN-controller 26 LIFE SUPPORT APPLICATIONS 13.5 Control Segment and Message Buffer description 13.6 CAN 2.0A Protocol description 1996 Jun 27 2