PCA9601 Dual bidirectional bus buffer Rev. 3.1 4 January 2022 Product data sheet 1 General description 2 The PCA9601 is designed to isolate I C-bus capacitance, allowing long buses to be driven in point-to-point or multipoint applications of up to 4000 pF. The PCA9601 is a higher-speed version of the P82B96 and a higher drive version of the PCA9600 that allows many more Fast-mode Plus (Fm+) slaves on remote daughter cards in applications with temperature range of 0 C to 85 C. 2 It creates a non-latching, bidirectional, logic interface between a normal I C-bus and a range of other higher capacitance or different voltage bus configurations. It can operate at speeds up to at least 1 MHz, and the high drive side is compatible with the Fast-mode Plus specifications. The PCA9601 features temperature-stabilized logic voltage levels at its SX/SY interface 2 making it suitable for interfacing with buses that have non I C-bus-compliant logic levels such as SMBus, PMBus, or with microprocessors that use those same TTL logic levels. 15 mA drive capability over 0 C to 85 C at SX/SY allows driving a 5 V Fm+ bus with 470 pF loading. 2 The separation of the bidirectional I C-bus signals into unidirectional TX and RX signals enables the SDA and SCL signals to be transmitted via balanced transmission lines (twisted pairs), or with galvanic isolation using opto or magnetic coupling. The TX and RX signals may be connected together to provide a normal bidirectional signal. 2 Features and benefits 2 Bidirectional data transfer of I C-bus signals 15 mA SX/SY sink capability yields 5 V Fm+ bus rise time with 470 pF loads Isolates capacitance allowing > 400 pF on SX/SY side and 4000 pF on TX/TY side 1 MHz operation on up to 20 meters of wire (see AN10658) 2 Supply voltage range of 2.5 V to 15 V with I C-bus logic levels on SX/SY side independent of supply voltage 2 Splits I C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interface with opto-electrical isolators and similar devices that need unidirectional input and output signal paths Low power supply current ESD protection exceeds 3500 V HBM per JESD22-A114, and 1400 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Packages offered: SO8 and TSSOP8 (MSOP8)NXP Semiconductors PCA9601 Dual bidirectional bus buffer 3 Applications 2 Interface between I C-buses operating at different logic levels (for example, 5 V and 3 V or 15 V) 2 Interface between I C-bus and SMBus (350 A) standard or Fm+ standard 2 Simple conversion of I C-bus SDA or SCL signals to multi-drop differential bus hardware, for example, via compatible PCA82C250 2 Interfaces with opto-couplers to provide opto-isolation between I C-bus nodes up to 1 MHz Long distance point-to-point or multipoint architectures 4 Ordering information Table 1.Ordering information Type number Topside Package marking Name Description Version PCA9601D PCA9601 SO8 plastic small outline package 8 leads body width 3.9 mm SOT96-1 PCA9601DP 9601 TSSOP8 plastic thin shrink small outline package 8 leads body width 3 mm SOT505-1 4.1 Ordering options Table 2.Ordering options 1 Type number Orderable part Package Packing method Minimum order Temperature number quantity PCA9601D PCA9601D,118 SO8 REEL 13 Q1/T1 2500 T = -40 C to +85 C amb *STANDARD MARK SMD PCA9601DP PCA9601DP,118 TSSOP8 REEL 13 Q1/T1 2500 T = -40 C to +85 C amb *STANDARD MARK SMD 2 3 PCA9601DPZ TSSOP8 REEL 13 Q1/T1 SSB 2500 T = -40 C to +85 C amb 1 Standard packing quantities and other packaging data are available at www.nxp.com/packages/. 2 Orderable part number PCA9601DPZ is drop in alternate for PCA9601DP,118 3 This packing method uses a Static Shielding Bag (SSB) solution. Material should be kept in the sealed bag between uses. 5 Block diagram V (2.5 V to 15 V) CC 8 PCA9601 1 3 SX (SDA) TX (TxD, SDA) 2 RX (RxD, SDA) static level offset higher drive, card side longer distance side 5 7 SY (SCL) TY (TxD, SCL) 6 RY (RxD, SCL) 4 GND 002aae873 Figure 1.Block diagram of PCA9601 PCA9601 All information provided in this document is subject to legal disclaimers. NXP B.V. 2022. All rights reserved. Product data sheet Rev. 3.1 4 January 2022 2 / 31