PCA9703PW,112 NXP

PCA9703 18 V tolerant SPI 16-bit GPI with maskable INT Rev. 4 5 September 2014 Product data sheet 1. General description The PCA9703 is a low power 18 V tolerant SPI General Purpose Input (GPI) shift register designed to monitor the status of switch inputs. It generates an interrupt when one or more of the switch inputs change state but allows selected inputs to not generate interrupts using the interrupt masking feature. The input level is recognized as a HIGH when it is greater than 0.8 V and as a LOW when it is less than 0.55 V (minimum DD DD LOW threshold of 2.5 V at 5 V node). The PCA9703 can monitor up to 16 switch inputs. The falling edge of the CS pin samples the input port status and clears the interrupt. When CS is LOW, the rising edge of the SCLK loads the shift register and shifts the value out of the shift register. The serial input is sampled on the falling edge of SCLK. The contents of the shift register are loaded into the interrupt mask register of the device on the rising edge of CS. Each of the input ports has a 18 V breakdown ESD protection circuit, which dumps the ESD/overvoltage current to ground. When used with a series resistor (minimum 100 k), the input can connect to a 12 V battery and support double battery, reverse battery, 27 V jump start and 40 V load dump conditions in automotive applications. Higher voltages can be tolerated on the inputs depending on the series resistor used to limit the input current. The INT EN pin is used to both enable the GPI pins and to enable the INT output pin to minimize battery drain in cyclically supplied pull-up or pull-down applications. The SDIN pull-down prevents floating nodes when the device is used in daisy-chain applications. With both the high breakdown voltage and high ESD, this device is useful for both automotive (AEC-Q100 compliance available) and mobile applications. 2. Features and benefits 16 general purpose input ports 18 V tolerant input ports with 100 k external series resistor Input LOW threshold 0.55 V with minimum of 2.5 V at V =4.5 V DD DD Open-drain interrupt output Interrupt enable pin (INT EN) disables GPI pins and interrupt output Interrupt-masking feature allows no interrupt generation from selected inputs V range: 4.5 V to 5.5 V DD I is very low 2.5 A maximum DD SPI serial interface with speeds up to 5 MHz SPI supports daisy-chain connection for large switch numbers AEC-Q100 compliance availablePCA9703 NXP Semiconductors 18 V tolerant SPI 16-bit GPI with maskable INT ESD protection exceeds 5 kV HBM per JESD22-A114 and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Operating temperature range: 40 C to +125 C Offered in TSSOP24 and HWQFN24 packages 3. Applications Automotive Body control modules Electronic control units (for example, for body controller) Switch monitoring SBC wake pin extension Industrial equipment Cellular telephones Emergency lighting 4. Ordering information Table 1. Ordering information Type number Topside Package marking Name Description Version PCA9703HF 9703 HWQFN24 plastic thermal enhanced very very thin quad flat package SOT994-1 no leads 24 terminals body 4 4 0.75 mm PCA9703PW PCA9703PW TSSOP24 plastic thin shrink small outline package 24 leads SOT355-1 body width 4.4 mm 1 PCA9703PW TSSOP24 plastic thin shrink small outline package 24 leads SOT355-1 PCA9703PW/Q900 body width 4.4 mm 1 PCA9703PW/Q900 is AEC-Q100 compliant. Contact i2c.support nxp.com for PPAP. PCA9703 All information provided in this document is subject to legal disclaimers. NXP B.V. 2014. All rights reserved. Product data sheet Rev. 4 5 September 2014 2 of 28