PMN40LN,135 NXP

PMN40LN TrenchMOS logic level FET Rev. 01 13 November 2002 Product data M3D302 1. Description N-channel logic level eld-effect power transistor in a plastic package using TrenchMOS technology. Product availability: PMN40LN in SOT457 (TSOP6). 2. Features TrenchMOS technology Logic level compatible Surface mount package. 3. Applications Battery management High speed switch Low power DC to DC converter. 4. Pinning information Table 1: Pinning - SOT457 (TSOP6), simplied outline and symbol Pin Description Simplied outline Symbol 1,2,5,6 drain (d) d 6 5 4 3 gate (g) 4 source (s) g s MBB076 132 Top view MBK092 SOT457 (TSOP6)PMN40LN Philips Semiconductors TrenchMOS logic level FET 5. Quick reference data Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit V drain-source voltage (DC) 25 C T 150 C - 30 V DS j I drain current (DC) T =25 C; V =10V - 5.4 A D sp GS P total power dissipation T =25 C - 1.75 W tot sp T junction temperature - 150 C j R drain-source on-state resistance V = 10 V; I = 2.5 A; T =25 C 3238m DSon GS D j V = 4.5 V; I = 2 A; T =25 C 4045m GS D j 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage (DC) 25 C T 150 C - 30 V DS j V drain-gate voltage (DC) 25 C T 150 C; R =20k -30 V DGR j GS V gate-source voltage (DC) - 15 V GS I drain current (DC) T =25 C; V =10V; Figure 2 and 3 - 5.4 A D sp GS T =70 C; V =10V; Figure 2 -4 A sp GS I peak drain current T =25 C; pulsed; t 10 s; Figure 3 - 21.6 A DM sp p P total power dissipation T =25 C; Figure 1 - 1.75 W tot sp T storage temperature - 55 +150 C stg T junction temperature - 55 +150 C j Source-drain diode I source (diode forward) current (DC) T =25 C - 1.45 A S sp I peak source (diode forward) current T =25 C; pulsed; t 10 s - 5.8 A SM sp p 9397 750 10192 Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 13 November 2002 2 of 12