PMV60EN,215 NXP

PMV60EN TrenchMOS enhanced logic level FET Rev. 01 15 January 2003 Product data M3D088 1. Product prole 1.1 Description N-channel enhancement mode eld-effect transistor in a plastic package using TrenchMOS technology. Product availability: PMV60EN in SOT23. 1.2 Features Surface mount package Fast switching. 1.3 Applications Battery management High speed switch. 1.4 Quick reference data V 30 V I 4.7 A DS D P 2W R 55 m tot DSon 2. Pinning information Table 1: Pinning - SOT23 simplied outline and symbol Pin Description Simplied outline Symbol 1 gate (g) d 3 2 source (s) 3 drain (d) g s MBB076 12 Top view MSB003 SOT23PMV60EN Philips Semiconductors TrenchMOS enhanced logic level FET 3. Limiting values Table 2: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage (DC) 25 C T 150 C - 30 V DS j V drain-gate voltage (DC) 25 C T 150 C R =20k -30 V DGR j GS V gate-source voltage (DC) - 20 V GS I drain current (DC) T =25 C V =10V Figure 2 and 3 - 4.7 A D sp GS T = 100 C V =10V Figure 2 - 2.9 A sp GS I peak drain current T =25 C pulsed t 10 s Figure 3 - 18.8 A DM sp p P total power dissipation T =25 C Figure 1 -2 W tot sp T storage temperature - 55 +150 C stg T junction temperature - 55 +150 C j Source-drain diode I source (diode forward) current (DC) T =25 C - 1.7 A S sp I peak source (diode forward) current T =25 C pulsed t 10 s - 6.9 A SM sp p 9397 750 10895 Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 01 15 January 2003 2 of 12