PSMN9R0-25YLC NXP

PSMN9R0-25YLC N-channel 25 V 9.1 m logic level MOSFET in LFPAK using NextPower technology Rev. 2 1 November 2011 Product data sheet 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High reliability Power SO8 package, Optimised for 4.5V Gate drive utilising qualified to 175C NextPower Superjunction technology Low parasitic inductance and Ultra low QG, QGD, & QOSS for high resistance system efficiencies at low and high loads 1.3 Applications DC-to-DC converters Synchronous buck regulator Load switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage 25 C T 175 C - - 25 V DS j I drain current T =25C V = 10 V see Figure 1 --46 A D mb GS P total power dissipation T = 25 C see Figure 2 --34 W tot mb T junction temperature -55 - 175 C j Static characteristics R drain-source on-state V = 4.5 V I =15A T =25C - 10.5 12.3 m DSon GS D j resistance see Figure 12 V =10V I =15 A T =25C -7.7 9.1 m GS D j see Figure 12 Dynamic characteristics Q gate-drain charge V = 4.5 V I =15A V =12V -1.8 -nC GD GS D DS see Figure 14 see Figure 15 Q total gate charge - 5.6 - nC G(tot) LFPAKPSMN9R0-25YLC NXP Semiconductors N-channel 25 V 9.1 m logic level MOSFET in LFPAK using NextPower technology 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1S source mb D 2S source 3S source G 4 G gate mbb076 S mb D mounting base connected to drain 1234 SOT669 (LFPAK Power-SO8) 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PSMN9R0-25YLC LFPAK Power-SO8 plastic single-ended surface-mounted package 4 leads SOT669 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage 25 C T 175 C - 25 V DS j V drain-gate voltage 25 C T 175 C R =20k -25 V DGR j GS V gate-source voltage -20 20 V GS I drain current V =10V T = 25 C see Figure 1 -46 A D GS mb V =10V T =100 C see Figure 1 -32 A GS mb I peak drain current pulsed t 10 s T =25C - 183 A DM p mb see Figure 4 P total power dissipation T = 25 C see Figure 2 -34 W tot mb T storage temperature -55 175 C stg T junction temperature -55 175 C j T peak soldering temperature - 260 C sld(M) V electrostatic discharge voltage MM (JEDEC JESD22-A115) 140 - V ESD Source-drain diode I source current T =25C - 31 A S mb I peak source current pulsed t 10 s T = 25 C - 183 A SM p mb Avalanche ruggedness E non-repetitive drain-source V =10V T =25 C I =46A -10 mJ DS(AL)S GS j(init) D avalanche energy V 25 V unclamped R =50 sup GS see Figure 3 PSMN9R0-25YLC All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 1 November 2011 2 of 15