PTN3361B HDMI/DVI level shifter with dongle detect support and active DDC buffer Rev. 02 7 October 2009 Product data sheet 1. General description The PTN3361B is a high-speed level shifter device which converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain current-steering differential output signals, up to 1.65 Gbit/s per lane. Each of these lanes provides a level-shifting differential buffer to translate from low-swing AC-coupled differential signaling on the source side, to TMDS-type DC-coupled differential current-mode signaling terminated into 50 to 3.3 V on the sink side. Additionally, the PTN3361B provides a single-ended active buffer for voltage translation of the HPD signal from 5 V on the sink side to 3.3 V on the source side and provides a channel with active buffering and level shifting of the DDC channel (consisting of a clock and a data line) between 3.3 V source-side and 5 V sink-side. The DDC channel is implemented using 2 active I C-bus buffer technology providing capacitive isolation, redriving and level shifting as well as disablement (isolation between source and sink) of the clock and data lines. The low-swing AC-coupled differential input signals to the PTN3361B typically come from a display source with multi-mode I/O, which supports multiple display standards, e.g., DisplayPort, HDMI and DVI. While the input differential signals are congured to carry DVI or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0 or HDMI v1.3a specication. By using PTN3361B, chip set vendors are able to implement such recongurable I/Os on multi-mode display source devices, allowing the support of multiple display standards while keeping the number of chip set I/O pins low. See Figure 1. The PTN3361B main high-speed differential lanes feature low-swing self-biasing differential inputs which are compliant to the electrical specications of DisplayPort Standard v1.1 and/or PCI Express Standard v1.1, and open-drain current-steering differential outputs compliant to DVI v1.0 and HDMI v1.3a electrical specications. The 2 I C-bus channel actively buffers as well as level-translates the DDC signals for optimal 2 capacitive isolation. Its I C-bus control block also provides for optional software HDMI dongle detect by issuing a predetermined code sequence upon a read command to an 2 I C-bus specied address. The PTN3361B also supports power-saving modes in order to minimize current consumption when no display is active or connected. The PTN3361B is a fully featured HDMI as well as DVI level shifter. It is functionally comparable to PTN3360B but provides additional features supporting HDMI dongle detection and active DDC buffering. For HDMI dongles, support of HDMI dongle detection via the DDC channel is mandatory, hence HDMI dongle applications should enable this feature for correct operation in accordance with DisplayPort interoperability guidelines. PTN3361B is powered from a single 3.3 V power supply consuming a small amount of power (90 mW typ.) and is offered in a 48-terminal HVQFN48 package.PTN3361B NXP Semiconductors HDMI/DVI level shifter with dongle detect and DDC buffer MULTI-MODE DISPLAY SOURCE OE N PTN3361B reconfigurable I/Os PCIe PHY ELECTRICAL AC-coupled OUT D4+ PCIe TMDS differential pair OUT D4- coded output buffer TMDS data TX IN D4+ data FF DATA LANE IN D4- TX AC-coupled OUT D3+ PCIe TMDS differential pair OUT D3- coded output buffer TMDS data TX IN D3+ data FF DATA LANE IN D3- TX AC-coupled OUT D2+ TMDS PCIe differential pair OUT D2- output buffer coded TMDS data TX data IN D2+ DATA LANE FF IN D2- TX AC-coupled OUT D1+ TMDS PCIe differential pair OUT D1- output buffer clock clock TX pattern IN D1+ CLOCK LANE FF IN D1- TX 0 V to 3.3 V 0 V to 5 V HPD SOURCE HPD SINK DDC EN 3.3 V (0 V to 3.3 V) 3.3 V 5 V SCL SOURCE SCL SINK 3.3 V 5 V DDC I/O 2 (I C-bus) CONFIGURATION SDA SOURCE SDA SINK 002aae053 Remark: TMDS clock and data lanes can be assigned arbitrarily and interchangeably to D 4:1 . Fig 1. Typical application system diagram PTN3361B 2 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 7 October 2009 2 of 29 DVI/HDMI CONNECTOR