74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs March 2007 74ABT541 tm Octal Buffer/Line Driver with 3-STATE Outputs Features General Description Non-inverting buffers The ABT541 is an octal buffer and line driver with 3-STATE outputs designed to be employed as a memory Output sink capability of 64mA, source capability of and address driver, clock driver, or bus-oriented trans- 32mA mitter/receiver. The ABT541 is similar to the ABT244 Guaranteed output skew with broadside pinout. Guaranteed multiple output switching specifications Output switching specified for both 50pF and 250pF loads Guaranteed simultaneous switching, noise level and dynamic threshold performance Guaranteed latchup protection High-impedance, glitch-free bus loading during entire power up and power down cycle Nondestructive, hot-insertion capability Flow-through pinout for ease of PC board layout Disable time less than enable time to avoid bus contention Ordering Information Package Order Number Number Package Description 74ABT541CSC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74ABT541CSJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ABT541CMSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74ABT541CMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix X to the ordering number. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Descriptions Pin Names Description OE , OE Output Enable Input (Active LOW) 1 2 I I Inputs 0 7 O O Outputs 0 7 1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT541 Rev. 1.474ABT541 Octal Buffer/Line Driver with 3-STATE Outputs Truth Table Inputs OE OE I Outputs 1 2 LL H H HX X Z XHX Z LLL L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Rating T Storage Temperature 65C to +150C STG Ambient Temperature Under Bias 55C to +125C T A T Junction Temperature Under Bias 55C to +150C J V V Pin Potential to Ground Pin 0.5V to +7.0V CC CC (1) Input Voltage 0.5V to +7.0V V IN (1) I Input Current 30mA to +5.0mA IN V Voltage Applied to Any Output O Disabled or Power-Off State 0.5V to 5.5V HIGH State 0.5V to V CC Current Applied to Output in LOW State (Max.) twice the rated I (mA) OL DC Latchup Source Current 500mA Over Voltage Latchup (I/O) 10V Note: 1. Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Rating T Free Air Ambient Temperature 40C to +85C A V Supply Voltage +4.5V to +5.5V CC V / t Minimum Input Edge Rate Data Input 50mV/ns Enable Input 20mV/ns 1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT541 Rev. 1.4 2