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This literature is subject to all applicable copyright laws and is not for resale in any manner.74LCX240 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs January 2008 74LCX240 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs Features General Description 5V tolerant inputs and outputs The LCX240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, 2.3V3.6V V specifications provided CC clock driver and bus oriented transmitter or receiver. The 6.5ns t max. (V = 3.3V), 10A I max. PD CC CC device is designed for low voltage (2.5V or 3.3V) V CC Power-down high impedance inputs and outputs applications with capability of interfacing to a 5V signal (1) Supports live insertion/withdrawal environment. 24mA output drive (V = 3.0V) CC The LCX240 is fabricated with an advanced CMOS tech- Implements proprietary noise/EMI reduction circuitry nology to achieve high speed operation while maintain- Latch-up performance exceeds 500mA ing CMOS low power dissipation. ESD performance: Human body model > 2000V Machine model > 200V Note: 1. To ensure the high-impedance state during power up or down, OE should be tied to V through a pull-up CC resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Information Order Package Number Number Package Description 74LCX240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LCX240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX240MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74LCX240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX240 Rev. 1.6.0