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December 2013
74LCX244
Low Voltage Buffer/Line Driver with 5V Tolerant
Inputs and Outputs
Features General Description
5V tolerant inputs and outputs The LCX244 contains eight non-inverting buffers with
3-STATE outputs. The device may be employed as a
2.3V to 3.6V V specifications provided
CC
memory address driver, clock driver and bus-oriented
6.5ns t max. (V = 3.3V), 10A I max.
PD CC CC
transmitter/receiver. The LCX244 is designed for low
Power down high impedance inputs and outputs
applications with capability of
voltage (2.5V or 3.3V) V
CC
(1)
Supports live insertion/withdrawal
interfacing to a 5V signal environment.
24mA output drive (V = 3.0V)
CC
The LCX244 is fabricated with an advanced CMOS tech-
Implements proprietary noise/EMI reduction circuitry
nology to achieve high speed operation while maintain-
Latch-up performance exceeds 500mA
ing CMOS low power dissipation.
ESD performance:
Human body model > 2000V
Machine model > 200V
Leadless DQFN package
Note:
1. To ensure the high-impedance state during power up
or down, OE should be tied to V through a pull-up
CC
resistor: the minimum value or the resistor is
determined by the current-sourcing capability of the
driver.
Ordering Information
Package
Order Number Number Package Description
74LCX244WM
M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX244SJ
M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
(2)
74LCX244BQX MLP20B
JEDEC MO-241, 2.5 x 4.5mm
74LCX244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX244MTC 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
MTC20
4.4mm Wide
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
1994 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX244 Rev. 1.12.2