74LVC125A Low-Voltage CMOS Quad Buffer With 5 VTolerant Inputs and Outputs (3State, NonInverting) www.onsemi.com The 74LVC125A is a high performance, noninverting quad buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible MARKING inputs significantly reduce current loading to input drivers while TTL DIAGRAMS compatible outputs offer improved switching noise performance. A V I specification of 5.5 V allows 74LVC125A inputs to be safely driven from 5.0 V devices. The 74LVC125A is suitable for memory address 14 SOIC14 driving and all TTL level bus oriented transceiver applications. LVC125AG 14 D SUFFIX Current drive capability is 24 mA at the outputs. The Output Enable AWLYWW CASE 751A 1 (OEn) inputs, when HIGH, disable the outputs by placing them in a 1 HIGH Z condition. Features Designed for 1.2 to 3.6 V V Operation 14 CC LVC 5.0 V Tolerant Interface Capability With 5.0 V TTL Logic TSSOP14 125A 14 DT SUFFIX ALYW Supports Live Insertion and Withdrawal CASE 948G 1 1 I Specification Guarantees High Impedance When V = 0 V OFF CC 24 mA Output Sink and Source Capability Near Zero Static Supply Current in all Three Logic States (10 A) A = Assembly Location Substantially Reduces System Power Requirements L, WL = Wafer Lot Y, YY = Year ESD Performance: Human Body Model >2000 V W, WW = Work Week Machine Model >200 V G or = PbFree Package These Devices are PbFree, Halogen Free/BFR Free and are RoHS (Note: Microdot may be in either location) Compliant ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: October, 2015 Rev. 0 74LVC125A/D74LVC125A V OE3D3 O3 OE2D2 O2 CC 14 13 12 11 10 9 8 1 10 OE0 OE2 2 3 9 8 D0 O0 D2 O2 4 13 OE1 OE3 5 6 12 11 D1 O1 D3 O3 1 2 3456 7 OE0D0 O0 OE1 D1 O1 GND Figure 1. Pinout: 14Lead (Top View) Figure 2. Logic Diagram PIN NAMES TRUTH TABLE Pins Function INPUTS OUTPUTS OEn Output Enable Inputs OEn Dn On Dn Data Inputs L L L On 3State Outputs L H H H X Z H = High Voltage Level L = Low Voltage Level Z = High Impedance State X = High or Low Voltage Level and Transitions Are Acceptable for I reasons, DO NOT FLOAT Inputs CC www.onsemi.com 2