74LVC245A Product Preview Low-Voltage CMOS Octal Transceiver With 5 VTolerant Inputs and Outputs www.onsemi.com (3State, NonInverting) The 74LVC245A is a high performance, noninverting octal MARKING transceiver operating from a 1.2 to 3.6 V supply. High impedance TTL DIAGRAMS compatible inputs significantly reduce current loading to input drivers 20 while TTL compatible outputs offer improved switching noise performance. A V specification of 5.5 V allows 74LVC245A inputs to I SOIC20 LVC245A be safely driven from 5 V devices if V is less than 5.0 V. The DW SUFFIX 20 CC AWLYYWWG CASE 751D 74LVC245A is suitable for memory address driving and all TTL level 1 bus oriented transceiver applications. 1 Current drive capability is 24 mA at both A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow 20 through the bidirectional transceiver. Transmit (activeHIGH) LVC enables data from A ports to B ports Receive (activeLOW) enables TSSOP20 245A DT SUFFIX data from B to A ports. The Output Enable input, when HIGH, 20 ALYW CASE 948E disables both A and B ports by placing them in a HIGH Z condition. 1 1 Features Designed for 1.2 to 3.6 V V Operation CC A = Assembly Location 5 V Tolerant Interface Capability with 5 V TTL Logic L, WL = Wafer Lot Y, YY = Year Supports Live Insertion and Withdrawal W, WW = Work Week G or = PbFree Package I Specification Guarantees High Impedance When V = 0 V OFF CC 24 mA Output Sink and Source Capability (Note: Microdot may be in either location) Near Zero Static Supply Current in All Three Logic States (10 A) Substantially Reduces System Power Requirements ORDERING INFORMATION Latchup Performance Exceeds 250 mA See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ESD Performance: Human Body Model >2000 V Machine Model >200 V These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: June, 2015 Rev. P0 74LVC245A/D74LVC245A V OE B0 B1 B2 B3 B4 B5 B6 B7 CC OE 19 20 19 18 17 16 15 14 13 12 11 T/R 1 2 A0 18 B0 1 2 3 4567 9 8 10 3 A1 T/R A0 A1 A2 A3 A4 A5 A6 A7 GND 17 B1 Figure 1. Pinout (Top View) 4 A2 16 B2 PIN NAMES 5 PINS FUNCTION A3 OE Output Enable Input 15 B3 T/R Transmit/Receive Input A0A7 Side A 3State Inputs or 3State Outputs 6 A4 B0B7 Side B 3State Inputs or 3State Outputs 14 B4 7 A5 TRUTH TABLE 13 B5 INPUTS OPERATING MODE 8 NonInverting A6 OE T/R 12 L L B Data to A Bus B6 9 L H A Data to B Bus A7 H X Z 11 B7 H = High Voltage Level L = Low Voltage Level Z = High Impedance State Figure 2. Logic Diagram X = High or Low Voltage Level and Transitions are Acceptable For I reasons, Do Not Float Inputs CC www.onsemi.com 2