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This literature is subject to all applicable copyright laws and is not for resale in any manner.74LVT373, 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs February 2008 74LVT373, 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs Features General Description Input and output interface capability to systems at The LVT373 and LVTH373 consist of eight latches with 5V V 3-STATE outputs for bus organized system applications. CC The latches appear transparent to the data when Latch Bushold data inputs eliminate the need for external Enable (LE) is HIGH. When LE is LOW, the data satisfy- pull-up resistors to hold unused inputs (74LVTH373), ing the input timing requirements is latched. Data also available without bushold feature (74LVT373) appears on the bus when the Output Enable (OE) is Live insertion/extraction permitted LOW. When OE is HIGH, the bus output is in a high Power Up/Down high impedance provides glitch-free impedance state. bus loading The LVTH373 data inputs include bushold, eliminating Outputs source/sink 32 mA/+64 mA the need for external pull-up resistors to hold unused Functionally compatible with the 74 series 373 inputs. ESD performance: These octal latches are designed for low-voltage (3.3V) Human-body model > 2000V V applications, but with the capability to provide a TTL CC Machine model > 200V interface to a 5V environment. The LVT373 and Charged-device model > 1000V LVTH373 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. Ordering Information Package Order Number Number Package Description 74LVT373WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LVT373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVT373MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVTH373WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LVTH373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVTH373MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVT373, 74LVTH373 Rev. 1.5.0