February 2010 74LVX3245 8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs General Description Features The LVX3245 is a dual-supply, 8-bit translating transceiver Bidirectional interface between 3V and 5V buses that is designed to interface between a 3V bus and a 5V Inputs compatible with TTL level bus in a mixed 3V/5V supply environment. The Transmit/ 3V data flow at A Port and 5V data flow at B Port Receive (T/R) input determines the direction of data flow. Outputs source/sink 24 mA Transmit (active-HIGH) enables data from A Ports to B Ports Receive (active-LOW) enables data from B Ports to Guaranteed simultaneous switching noise level and dynamic threshold performance A Ports. The Output Enable input, when HIGH, disables both A and B Ports by placing them in a high impedance Implements proprietary EMI reduction circuitry condition. The A Port interfaces with the 3V bus the B Port Functionally compatible with the 74 series 245 interfaces with the 5V bus. The LVX3245 is suitable for mixed voltage applications such as notebook computers using 3.3V CPU and 5V peripheral components. Ordering Code: Order Number Package Number Package Description 74LVX3245WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LVX3245QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide 74LVX3245MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter X to the ordering code. Logic Symbol/s Connection Diagram/s Pin Descriptions Pin Names Description OE Output Enable Input T/R Transmit/Receive Input A A Side A Inputs or 3-STATE Outputs 0 7 B B Side B Inputs or 3-STATE Outputs 0 7 1993 Fairchild Semiconductor Corporation www.fairchildsemi.comTruth Table/s Inputs Outputs OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X HIGH-Z State H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram/s www.fairchildsemi.com 2