74LVXC4245WMX ON Semiconductor

74LVXC4245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE Outputs February 1994 Revised October 2003 74LVXC4245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE Outputs General Description Features The LVXC4245 is a 24-pin dual-supply, 8-bit configurable Bidirectional interface between 5V and 3V-to-5V buses voltage interface transceiver suited for PCMCIA and other Control inputs compatible with TTL level real time configurable I/O applications. The V pin CCA Outputs source/sink up to 24 mA accepts a 5V supply level. The A Port is a dedicated 5V Guaranteed simultaneous switching noise level and port. The V pin accepts a 3V-to-5V supply level. The CCB dynamic threshold performance B Port is configured to track the V supply level CCB Implements patented EMI reduction circuitry respectively. A 5V level on the V pin will configure the CC Flexible V operating range CCB I/O pins at a 5V level and a 3V V will configure the I/O CC Allows B Port and V to float simultaneously when OE pins at a 3V level. This device will allow the V voltage CCB CCB is HIGH source pin and I/O pins on the B Port to float when OE is HIGH. This feature is necessary to buffer data to and from Functionally compatible with the 74 series 245 a PCMCIA socket that permits PCMCIA cards to be inserted and removed during normal operation. Ordering Code: Order Number Package Number Package Description 74LVXC4245WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LVXC4245QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide 74LVXC4245MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names Description OE Output Enable Input T/R Transmit/Receive Input A A Side A Inputs or 3-STATE Outputs 0 7 B B Side B Inputs or 3-STATE Outputs 0 7 2003 Fairchild Semiconductor Corporation DS012009 www.fairchildsemi.comTruth Table Inputs Outputs OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X HIGH-Z State H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram www.fairchildsemi.com 2 74LVXC4245