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This literature is subject to all applicable copyright laws and is not for resale in any manner.74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs November 1992 Revised April 2005 74VHC245 Octal Bidirectional Transceiver with 3-STATE Outputs General Description Features The VHC245 is an advanced high speed CMOS octal bus High Speed: t 4.0 ns (typ) at V 5V PD CC transceiver fabricated with silicon gate CMOS technology. High Noise Immunity: V V 28% V (Min) NIH NIL CC It achieves high speed operation similar to equivalent Bipo- Power Down Protection is provided on all inputs lar Schottky TTL while maintaining the CMOS low power dissipation. The VHC245 is intended for bidirectional asyn- Low Noise: V 0.9V (typ) OLP chronous communication between data busses. The direc- Low Power Dissipation: tion of data transmission is determined by the level of the I 4 PA (Max) T 25qC CC A T/R input. The enable input can be used to disable the device so that the busses are effectively isolated. All inputs Pin and Function Compatible with 74HC245 are equipped with protection circuits against static dis- charge. Ordering Code: Order Number Package Number Package Description 74VHC245M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74VHC245SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol Connection Diagram IEEE/IEC Pin Description Truth Table Inputs Outputs Pin Description OE T/R Names L L Bus B Data to Bus A OE Output Enable Input L H Bus A Data to Bus B T/R Transmit/Receive Input H X HIGH-Z State A A Side A Inputs or 3-STATE Outputs H HIGH Voltage Level L LOW Voltage Level X Immaterial 0 7 Any unused bus terminals during HIGH-Z State must be held HIGH or B B Side B Inputs or 3-STATE Outputs LOW. 0 7 2005 Fairchild Semiconductor Corporation DS011520 www.fairchildsemi.com