CD4050BCSJ ON Semiconductor

CD4049UBC CD4050BC Hex Inverting Buffer  Hex Non-Inverting Buffer October 1987 Revised April 2002 CD4049UBC  CD4050BC Hex Inverting Buffer  Hex Non-Inverting Buffer General Description Features The CD4049UBC and CD4050BC hex buffers are mono- Wide supply voltage range: 3.0V to 15V lithic complementary MOS (CMOS) integrated circuits con- Direct drive to 2 TTL loads at 5.0V over full temperature structed with N- and P-channel enhancement mode range transistors. These devices feature logic level conversion High source and sink current capability using only one supply voltage (V ). The input signal high DD Special input protection permits input voltages greater level (V ) can exceed the V supply voltage when these IH DD than V DD devices are used for logic level conversions. These devices are intended for use as hex buffers, CMOS to DTL/ Applications TTL converters, or as CMOS current drivers, and at V = DD 5.0V, they can drive directly two DTL/TTL loads over the CMOS hex inverter/buffer full operating temperature range.  CMOS to DTL/TTL hex converter  CMOS current sink or source driver  CMOS HIGH-to-LOW logic level converter Ordering Code: Order Number Package Number Package Description CD4049UBCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4049UBCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD4050BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4050BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagrams Pin Assignments for DIP CD4049UBC CD4050BC Top View Top View 2002 Fairchild Semiconductor Corporation DS005971 www.fairchildsemi.comSchematic Diagrams CD4049UBC 1 of 6 Identical Units  CD4050BC 1 of 6 Identical Units www.fairchildsemi.com 2 CD4049UBC CD4050BC