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This literature is subject to all applicable copyright laws and is not for resale in any manner.FIN1031 3.3V LVDS 4-Bit High Speed Differential Driver July 2001 Revised July 2001 FIN1031 3.3V LVDS 4-Bit High Speed Differential Driver General Description Features This quad driver is designed for high speed interconnects Greater than 400Mbs data rate utilizing Low Voltage Differential Signaling (LVDS) technol- 3.3V power supply operation ogy. The driver translates LVTTL signal levels to LVDS lev- 0.4ns maximum differential pulse skew els with a typical differential output swing of 350mV which 2.0ns maximum propagation delay provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed trans- Low power dissipation fer of clock and data. Power OFF protection The FIN1031 can be paired with its companion receiver, Meets or exceeds the TIA/EIA-644 LVDS standard the FIN1032, or any other Fairchild LVDS receiver. Pin compatible with equivalent RS-422 and LVPECL devices 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number Package Number Package Description FIN1031M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow FIN1031MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Function Table Connection Diagram Inputs Outputs EN EN D D D IN OUT+ OUT HX H H L HX L L H HX OPEN L H XL H H L XL L L H XL OPEN L H LH X Z Z H = HIGH Logic Level L = LOW Logic Level X = Dont Care Z = High Impedance Pin Descriptions Pin Name Description D , D , D , D LVTTL Data Inputs IN1 IN2 IN3 IN4 D , D , D , D Non-Inverting Driver Outputs OUT1+ OUT2+ OUT3+ OUT4+ D , D , D , D Inverting Driver Outputs OUT1 OUT2 OUT3 OUT4 EN Driver Enable Pin EN Inverting Driver Enable Pin V Power Supply CC GND Ground 2001 Fairchild Semiconductor Corporation DS500507 www.fairchildsemi.com