MC100EL59DWG ON Semiconductor

MC100EL59 5 V ECL Triple 2:1 Multiplexer Description The MC100EL59 is a triple 2:1 multiplexer with differential www.onsemi.com outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random logic applications. The 100 Series Contains Temperature Compensation. Features SOIC20 WB DW SUFFIX Individual or Common Select Controls CASE 751D05 500 ps Typical Propagation Delays PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V CC EE NECL Mode Operating Range: MARKING DIAGRAM* V = 0 V with V = 4.2 V to 5.7 V CC EE Q Output will Default LOW with Inputs Open or at V EE 20 Internal Input Pulldown Resistors ESD Protection: 100EL59 > 2 kV Human Body Model AWLYYWWG Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity: Level 3 (Pb-Free) 1 (For Additional Information, see Application Note AND8003/D) Flammability Rating: UL 94 V0 1.125 in, A = Assembly Location Oxygen Index: 28 to 34 WL = Wafer Lot YY = Year Transistor Count = 182 Devices WW = Work Week This Device is Pb-Free, Halogen Free and is RoHS Compliant G = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping MC100EL59DWG SOIC20 WB 38 Units/Tube (Pb-Free) Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 4 MC100EL59/DMC100EL59 V Q0 Q0 V Q1 Q1 V Q2 Q2 V CC CC CC EE 20 19 18 17 16 15 14 13 12 11 10 10 10 1 2 3 4 5678 9 10 COM SEL D0a D0b SEL0 D1a D1b SEL1 D2a D2b SEL2 Warning: All V and V pins must be externally connected CC EE to Power Supply to guarantee proper operation. Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View) Table 1. PIN DESCRIPTION PIN FUNCTION D0aD2a ECL Input Data a* D0bD2b ECL Input Data b* SEL0SEL2 ECL Individual Select Input* COM SEL ECL Common Select Input* Q0Q2 Q0Q2 ECL Differential Outputs V Positive Supply CC V Negative Supply EE *Pins will default LOW when left open. Table 2. TRUTH TABLE SEL* DATA H a L b *Pins will default LOW when left open. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Mode Power Supply V = 0 V 8 to 0 V CC EE V NECL Mode Power Supply V = 0 V 8 to 0 V EE CC V PECL Mode Input Voltage V = 0 V V V 6 to 0 V I EE I CC NECL Mode Input Voltage V = 0 V V V 6 to 0 V CC I EE I Output Current Continuous 50 mA out Surge 100 mA T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC20 WB 90 C/W JA 500 lfpm SOIC20 WB 60 C/W Thermal Resistance (Junction-to-Case) Standard Board SOIC20 WB 30 to 35 C/W JC T Wave Solder (Pb-Free) 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2