MC100EP16VADTG ON Semiconductor

MC10EP16VA, MC100EP16VA 3.3 V / 5 VECL Differential Receiver/Driver with High Gain Description www.onsemi.com The EP16VA is a world-class differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with high gain output. Q and Q outputs have a DC gain several HG HG 8 8 times larger than the DC gain of an EP16. 1 The V pin, an internally generated voltage supply, is available to 1 BB this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. BB SOIC8 NB TSSOP8 DFN8 V may also rebias AC coupled inputs. When used, decouple V BB BB D SUFFIX DT SUFFIX MN SUFFIX and V via a 0.01 F capacitor and limit current sourcing or sinking CC CASE 75107 CASE 948R02 CASE 506AA to 0.5 mA. When not used, V should be left open. BB Under open input conditions (pulled to V ) internal input clamps EE will force the Q output LOW. HG MARKING DIAGRAMS* Special considerations are required for differential inputs under No Signal conditions to prevent instability. 8 8 The 100 Series contains temperature compensation. HEP64 HP64 ALYW ALYW Features 14 1 270 ps Typical Propagation Delay 1 Gain = > 20 8 8 20 mV Minimum Input Voltage Swing KEP64 KP64 Maximum Frequency = > 3 GHz Typical ALYW ALYW PECL Mode Operating Range: 14 1 1 V = 3.0 V to 5.5 Vwith V = 0 V CC EE NECL Mode Operating Range: SOIC8 NB TSSOP8 DFN8 V = 0 V with V = 3.0 V to 5.5 V CC EE Open Input Default State H = MC10 A = Assembly Location K = MC100 L = Wafer Lot V Output BB 5M = MC10 Y = Year These Devices are Pb-Free, Halogen Free and are RoHS Compliant 3D = MC100 W = Work Week M = Date Code = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. Semiconductor Components Industries, LLC, 2008 1 Publication Order Number: August, 2016 Rev. 11 MC10EP16VA/D 3E M 5N M MC10EP16VA, MC100EP16VA Table 1. PIN DESCRIPTION NC 1 8 V CC PIN FUNCTION D*, D* ECL Data Inputs Q , Q ECL High Gain Data Outputs HG HG D 2 7 Q HG V Reference Voltage Output BB V Positive Supply CC V Negative Supply EE D 3 6 Q HG NC No Connect EP (DFN8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) V45 V BB EE or leave unconnected, floating open. * Pins will default LOW when left open. Figure 1. 8-Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 4 kV Machine Model > 200 V Charged Device Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC8 NB Level 1 TSSOP8 Level 3 DFN8 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL94 V0 0.125 in Transistor Count 167 Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2