MC100LVEL40DWR2G ON Semiconductor

MC100LVEL40 3.3/5V ECL Differential PhaseFrequency Detector Description The MC100LVEL40 is a three state phase frequencydetector intended for phaselocked loop applications which require a minimum MC100LVEL40 Table 1. PIN DESCRIPTION NC V UU V DD V NC NC CCO EE CCO PIN FUNCTION 20 19 18 17 16 15 14 13 12 11 U, U ECL Up Differential Outputs D, D ECL Down Differential Outputs FB, FB ECL Feedback Differential Inputs R, R ECL Reference Differential Inputs V Reference Voltage Output BB V , V Positive Supply CC CCO V Negative Supply EE 1 2 34567 9 8 10 NC No Connect NC NC R R V FB FB V NC NC BB CC Warning: All V , V , and V pins must be externally CC CCO EE connected to Power Supply to guarantee proper operation. Figure 1. 20Lead Pinout (Top View) RU SQ R U R V BB V D EE D R FB SQ FB Figure 2. Logic Diagram Table 2. ATTRIBUTES Characteristics Value ESD Protection Human Body Model > 2 kV Moisture Sensitivity (Note 1) Pb Pkg Pb Free Pkg SOIC20 Level 1 Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 356 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D.