MC10LVEP11, MC100LVEP11
2.5V / 3.3VECL 1:2
Differential Fanout Buffer
Description
The MC10/100LVEP11 is a differential 1:2 fanout buffer. The
device is pin and functionally equivalent to the EP11 device. With AC
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performance the same as the EP11 device, the LVEP11 is ideal for
applications requiring lower voltage. Single-ended CLK input
operation is limited to a V 3.0 V in PECL mode, or V
CC EE
8 8
3.0 V in NECL mode.
1
1
The 100 Series contains temperature compensation.
SOIC8NB TSSOP8
DFN8
D SUFFIX DT SUFFIX
Features
MN SUFFIX
CASE CASE
240 ps Typical Propagation Delay CASE 506AA
75107 948R02
Maximum Frequency > 3.0 GHz Typical
PECL Mode Operating Range:
MARKING DIAGRAMS*
V = 2.375 V to 3.8 V with V = 0 V
CC EE
NECL Mode Operating Range:
V = 0 V with V = 2.375 V to 3.8 V 8
CC EE 8
Open Input Default State HVP11
HU11
ALYW
ALYW
Q Output Will Default LOW with Inputs Open or at V
EE
14
LVDS Input Compatible 1
1
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
8
8
KVP11
KU11
ALYW
ALYW
14
1
1
H = MC10 A = Assembly Location
K = MC100 L = Wafer Lot
5X = MC10 Y= Year
4K = MC100 W = Work Week
M = Date Code
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information on page 9 of
this data sheet.
Semiconductor Components Industries, LLC, 2016
1 Publication Order Number:
August, 2016 Rev. 14 MC10LVEP11/D
4K M 5X M
MC10LVEP11, MC100LVEP11
Table 1. PIN DESCRIPTION
PIN FUNCTION
Q0 1 8 V
CC
D*, D** ECL Data Inputs
Q0, Q0, Q1, Q1 ECL Data Outputs
V Positive Supply
CC
Q0 2 7 D
V Negative Supply
EE
EP (DFN8 only) Thermal exposed pad
must be connected to a sufficient ther-
mal conduit. Electrically connect to the
most negative supply (GND) or leave
Q1 3 6 D
unconnected, floating open.
*Pins will default to 2/3 V when left open.
CC
**Pins will default LOW when left open.
Q145 V
EE
Figure 1. 8-Lead Pinout (Top View) and Logic
Diagram
Table 2. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor 75 k
Internal Input Pullup Resistor 37.5 k
ESD Protection
Human Body Model > 4 kV
Machine Model > 200 V
Charged Device Model > 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg
SOIC8NB Level 1
TSSOP8 Level 3
DFN8 Level 1
Flammability Rating UL 94 V0 @ 0.125 in
Oxygen Index: 28 to 34
Transistor Count 110 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2