MC74VHCT125ADTRG ON Semiconductor

MC74VHCT125A Quad Bus Buffer with 3State Control Inputs The MC74VHCT125A is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves high speed www.onsemi.com operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHCT125A requires the 3state control input (OE) to be MARKING DIAGRAMS set High to place the output into the high impedance state. The VHCT inputs are compatible with TTL levels. This device can 14 be used as a level converter for interfacing 3.3 V to 5.0 V, because it SOIC14 VHCT125AG has full 5.0 V CMOS level output swings. D SUFFIX AWLYWW CASE 751A The VHCT125A input structures provide protection when voltages 1 1 between 0 V and 5.5 V are applied, regardless of the supply voltage. The output structures also provide protection when V = 0 V. These CC 14 input and output structures help prevent device destruction caused by VHCT supply voltage input/output voltage mismatch, battery backup, hot TSSOP14 125A DT SUFFIX insertion, etc. ALYW CASE 948G The internal circuit is composed of three stages, including a buffer 1 output which provides high noise immunity and stable output. The 1 inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V A = Assembly Location systems to 3.0 V systems. L, WL = Wafer Lot Y, YY = Year Features WW, W = Work Week G or = PbFree Package High Speed: t = 3.8 ns (Typ) at V = 5.0 V PD CC (Note: Microdot may be in either location) Low Power Dissipation: I = 4.0 A (Max) at T = 25C CC A TTLCompatible Inputs: V = 0.8 V V = 2.0 V IL IH Power Down Protection Provided on Inputs ORDERING INFORMATION Balanced Propagation Delays See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Designed for 2.0 V to 5.5 V Operating Range Low Noise: V = 0.8 V (Max) OLP Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V Machine Model > 200 V Chip Complexity: 72 FETs or 18 Equivalent Gates NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ100 Qualified and PPAP Capable These Devices are PbFree and are RoHS Compliant Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: June, 2015 Rev. 11 MC74VHCT125A/DMC74VHCT125A PIN CONNECTION LOGIC DIAGRAM (Top View) ActiveLow Output Enables OE1 1 14 V CC 2 3 A1 2 13 OE4 A1 Y1 1 Y1 3 12 A4 OE1 OE2 4 11 Y4 5 6 A2 Y2 A2 5 10 OE3 4 OE2 Y2 6 9 A3 GND 7 8 Y3 9 8 Y3 A3 10 OE3 FUNCTION TABLE 12 11 A4 Y4 VHCT125A 13 OE4 Inputs Output AOE Y HL H LL L XH Z ORDERING INFORMATION Device Package Shipping MC74VHCT125ADR2G SOIC14 2500 / Tape & Reel (PbFree) MC74VHCT125ADTRG TSSOP14 2500 / Tape & Reel (PbFree) NLVVHCT125ADTRG* TSSOP14 2500 / Tape & Reel (PbFree) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ100 Qualified and PPAP Capable www.onsemi.com 2