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ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer September 1983 Revised May 2005 MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer General Description Features The MM74HC540 and MM74HC541 3-STATE buffers uti- Typical propagation delay: 12 ns lize advanced silicon-gate CMOS technology. They pos- 3-STATE outputs for connection to system buses sess high drive current outputs which enable high speed Wide power supply range: 26V operation even when driving large bus capacitances. Low quiescent current: 80 PA maximum (74HC Series) These circuits achieve speeds comparable to low power Schottky devices, while retaining the advantage of CMOS Output current: 6 mA circuitry, i.e., high noise immunity, and low power consump- tion. Both devices have a fanout of 15 LS-TTL equivalent inputs. The MM74HC540 is an inverting buffer and the MM74HC541 is a non-inverting buffer. The 3-STATE con- trol gate operates as a two-input NOR such that if either G1 or G2 are HIGH, all eight outputs are in the high-imped- ance state. In order to enhance PC board layout, the MM74HC540 and MM74HC541 offers a pinout having inputs and outputs on opposite sides of the package. All inputs are protected from damage due to static discharge by diodes to V and CC ground. Ordering Code: Order Number Package Number Package Description MM74HC540WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide MM74HC540SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC540MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC540N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide MM74HC541WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide MM74HC541SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC541N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP Top View MM74HC541 Top View MM74HC540 2005 Fairchild Semiconductor Corporation DS005341 www.fairchildsemi.com