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This literature is subject to all applicable copyright laws and is not for resale in any manner.MM74HCT240 MM74HCT244 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer February 1984 Revised May 2005 MM74HCT240 MM74HCT244 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer The MM74HCT240 is an inverting buffer and the General Description MM74HCT244 is a non-inverting buffer. Each device has The MM74HCT240 and MM74HCT244 3-STATE buffers two active low enables (1G and 2G), and each enable inde- utilize advanced silicon-gate CMOS technology and are pendently controls 4 buffers. general purpose high speed inverting and non-inverting All inputs are protected from damage due to static dis- buffers. They possess high drive current outputs which charge by diodes to V and Ground. CC enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable Features to low power Schottky devices, while retaining the low power consumption of CMOS. All three devices are TTL TTL input compatible input compatible and have a fanout of 15 LS-TTL equiva- Typical propagation delay: 14 ns lent inputs. 3-STATE outputs for connection to system buses MM74HCT devices are intended to interface between TTL Low quiescent current: 80 PA and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL High output drive current: 6 mA (min) devices and can be used to reduce power consumption in existing designs. Ordering Code: Order Number Package Number Package Description MM74HCT240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide MM74HCT240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide MM74HCT244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide MM74HCT244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP Top View Top View MM74HCT240 MM74HCT244 2005 Fairchild Semiconductor Corporation DS005365 www.fairchildsemi.com