MM74HCT32 Quad 2-Input OR Gate February 2008 MM74HCT32 Quad 2-Input OR Gate Features General Description TTL, LS pin-out and threshold compatible The MM74HCT32 is a logic function fabricated by using advanced silicon-gate CMOS technology, which pro- Fast switching: t , t = 10ns (typ.) PLH PHL vides the inherent benefits of CMOSlow quiescent Low power: 10W at DC power and wide power supply range. This device is input High fan-out, 10 LS-TTL loads and output characteristic and pin-out compatible with standard 74LS logic families. All inputs are protected from static discharge damage by internal diodes to V CC and ground. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. Ordering Information Package Order Number Number Package Description MM74HCT32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74HCT32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT32MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT32N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 1987 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT32 Rev. 1.3.0MM74HCT32 Quad 2-Input OR Gate Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Logic Diagram 1987 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT32 Rev. 1.3.0 2