NC7WZ240L8X ON Semiconductor

TinyLogic UHS Dual Inverting Buffer with 3-STATE Outputs NC7WZ240 Description www.onsemi.com The NC7WZ240 is a Dual Inverting Buffer with independent active LOW enables for the 3STATE outputs. The Ultra High Speed device MARKING is fabricated with advanced CMOS technology to achieve superior DIAGRAMS switching performance with high output drive while maintaining low static power dissipation over a broad V operating range. The device CC UQFN8 is specified to operate over the 1.65 V to 5.5 V V operating range. U7KK CC 1.6X1.6, 0.5P XYZ The inputs and outputs are high impedance when V is 0 V. Inputs CC CASE 523AY tolerate voltages up to 5.5 V independent of V operating range. CC Outputs tolerate voltages above V when in the 3STATE condition. CC Features XYKK Space Saving US8 Surface Mount Package WZ40 US8 MicroPak PbFree Leadless Package Z CASE 846AN ON Ultra High Speed: t = 2.3 ns Typ. into 50 pF at 5 V V PD CC High Output Drive: 24 mA at 3 V V CC Broad V Operating Range: 1.65 V to 5.5 V CC Matches the Performance of LCX when Operated at 3.3 V V CC U7, WZ40 = Specific Device Code KK = 2Digit Lot Run Traceability Code Power Down High Impedance Inputs / Outputs XY = 2Digit Date Code Format Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation Z = Assembly Plant Code Outputs are Overvoltage Tolerant in 3STATE Mode Proprietary Noise / EMI Reduction Circuitry Implemented ORDERING INFORMATION These Devices are PbFree, Halogen Free/BFR Free and are RoHS See detailed ordering, marking and shipping information in the package dimensions section on page 6 of this data sheet. Compliant IEEE/IEC A 1 1 Y 1 OE EN 1 A 2 1 Y 2 EN OE 2 Figure 1. Logic Symbol Semiconductor Components Industries, LLC, 2005 1 Publication Order Number: February, 2021 Rev. 2 NC7WZ240/DNC7WZ240 Connection Diagrams OE A Y 1 1 2 7 6 5 OE 1 8 V 1 CC A 2 7 OE 1 2 V 8 4 GND CC Y 3 6 Y 2 1 1 2 3 GND45 A 2 OE Y A 2 1 2 Figure 2. Pin Assignments for US8 Figure 4. Pad Assignments for MicroPak (Top View) (Top Thru View) (Top View) AAA Pin One AAA represents Product Code Top Mark see ordering code NOTE: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). Figure 3. Pin One Orientation Diagram PIN DESCRIPTIONS FUNCTION TABLE Pin Names Description Inputs Output OE Enable Inputs for 3STATE Outputs OE A Y n n n A Inputs L L H n Y 3STATE Outputs L H L n H L Z H H Z H = HIGH Logic Level L = LOW Logic Level Z = 3STATE www.onsemi.com 2