NCP1593AMNTWG ON Semiconductor

NCP1593A, NCP1593B Synchronous Buck Regulator 1 MHz, 3 A The NCP1593 is a fixed 1 MHz, highoutputcurrent, synchronous NCP1593A, NCP1593B BLOCK DIAGRAM NCP1593A VCCP VCC + CA Power Reset Ri UVLO EN THD Hiccup OSC + PMOS SS SoftStart M1 LX + PWM Control LX Logic Vref gm + + FB Rc1 Cc2 PG Cc1 Power PGND 0.9 x Vref Good Figure 1. Block Diagram PIN DESCRIPTIONS Pin No Symbol Description 1 NC / LX No connect pin for NCP1593A. The user may ground this pin or leave it floating. / LX pin for NCP1593B 2, 3 LX The drains of the internal MOSFETs. The output inductor should be connected to these pins. 4 PG Open drain output from the Power Good logic. When the FB voltage is within regulation, this is a high impedance pin. Otherwise it is pulled low. 5 EN Logic input to enable the part. Logic high to turn on the part and a logic low to shut off the part. An intern- al pullup forces the part into an enable state when no external bias is present on the pin. 6 FB Feedback input pin of the Error Amplifier. Connect a resistor divider from the converters output voltage to this pin to set the converters regulated voltage. 7 SS / NC An external capacitor on this pin sets the soft start ramp time. Leaving this pin open sets the soft start time at 500 s. For NCP1593B this pin is a no connect and should be left floating. 8 V Input supply pin for internal bias circuitry. Connect a 0.1 F ceramic bypass capacitor to this pin. Directly CC connect the V pin to the V pin on the board. CC CCP 9, 10 V Input for the power stage CCP EP GND Exposed pad of the package provides both electrical contact to the ground and good thermal contact to the PCB. This pad must be soldered to the PCB for proper operation.