NCP382LD10AAR2G ON Semiconductor

Fixed Current-Limiting Power-Distribution Switches NCP382 The NCP382 is a single input dual outputs high side powerdistribution switch designed for applications where heavy www.onsemi.com capacitive loads and shortcircuits are likely to be encountered. The device includes an integrated 80 m , P channel MOSFET. The MARKING device limits the output current to a desired level by switching into a DIAGRAM constantcurrent mode when the output load exceeds the currentlimit 8 threshold or a short is present. The currentlimit threshold is internally 8 XXXXXX fixed. The powerswitches rise and fall times are controlled to ALYWX 1 minimize current ringing during switching. SOIC8 NB The FLAG logic output asserts low during overcurrent or 1 CASE 751 overtemperature conditions. The switch is controlled by a logic enable input active high or low. XXXXX = Specific Device Code A = Assembly Location Features L = Wafer Lot 2.5 V 5.5 V Operating Range Y = Year 80 m HighSide MOSFET W = Work Week = PbFree Package Current Limit: Fixed 500 mA, 1 A and 1.5 A (Note: Microdot may be in either location) Undervoltage LockOut (UVLO) SoftStart Prevents Inrush Current Thermal Protection ORDERING INFORMATION See detailed ordering and shipping information in the package Soft TurnOff dimensions section on page 10 of this data sheet. Enable Active High or Low (EN or EN) Compliance to IEC6100042 (Level 4) 8.0 kV (Contact) 15 kV (Air) UL Listed for SOIC package (NCP382xDxxxx) File No. E343275 IEC60950 Edition 2 for SOIC package (NCP382xDxxxx) Amendments 1 & 2 Certified (CB Scheme) These are PbFree Devices Typical Applications Laptops USB Ports/Hubs TVs Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: April, 2020 Rev. 10 NCP382/DNCP382 USB DATA D+ D USB INPUT USB 5V IN OUT1 VBUS Port GND Rfault 1 F NCP382 120 F 100 k USB FLAG1 FLAG1 DATA EN1 EN1 D+ D FLAG2 USB FLAG2 VBUS OUT2 Port EN2 GND EN2 GND 120 F Figure 1. Typical Application Circuit 1 8 GND FLAG1 IN 2 7 OUT1 SOIC8 EN1 3 6 OUT2 EN2 4 5 FLAG2 Figure 2. Pin Connections PIN FUNCTION DESCRIPTION Pin Name Type Description EN1 I Enable 1 input, logic low/high (i.e. EN or EN) turns on power switch. EN2 I Enable 2 input, logic low/high (i.e. EN or EN) turns on power switch. GND P Ground connection. IN P Powerswitch input voltage connect a 1 F or greater ceramic capacitor from IN to GND as close as possible to the IC. FLAG1 O Activelow opendrain output 1, asserted during overcurrent or overtemperature conditions. Connect a 10 k or greater resistor pullup, otherwise leave unconnected. FLAG2 O Activelow opendrain output 2, asserted during overcurrent or overtemperature conditions. Connect a 10 k or greater resistor pullup, otherwise leave unconnected. OUT1 O Powerswitch output1 connect a 1 F ceramic capacitor from OUT1 to GND, as close as possible to the IC. This minimum value is recommended for USB requirement in terms of load transient response and strong short circuits. OUT2 O Powerswitch output2 connect a 1 F ceramic capacitor from OUT2 to GND, as close as possible to the IC. This minimum value is recommended for USB requirement in terms of load transient response and strong short circuits. www.onsemi.com 2