NCP81166MNTBG ON Semiconductor

NCP81166, NCP81166A Synchronous Buck MOSFET Drivers The NCP81166/A is a high performance dual MOSFET gate driver optimized to drive the gates of both highside and lowside power MOSFETs in a synchronous buck converter. 2mm x 2mm DFN8 NCP81166, NCP81166A PWM BST 1 NC DRVH GND 9 EN SW VCC DRVL (Top View) Figure 1. Pin Diagram BST VCC DRVH PWM Logic SW AntiCross Conduction VCC DRVL EN ZCD Detection UVLO PreOV Fault Figure 2. Block Diagram Table 1. Pin Descriptions Pin No. Symbol Description 1 PWM Control input. The PWM signal has three distinctive states: Low = Low Side FET Enabled, Mid = Diode Emu- lation Enabled, High = High Side FET Enabled. 2 NC No connect. There is no electrical connection from this pin to the die. Externally connecting this pin to ground will not affect the functionality of the part. 3 EN Logic input. A logic high to enable the part and a logic low to disable the part. Pin is internally pulled low dur- ing preOVP and UVLO faults. 4 VCC Power supply input. Connect a bypass capacitor (1 F) from this pin to ground. 5 DRVL Low side gate drive output. Connect to the gate of low side MOSFET. 6 SW Switch node. Connect this pin to the source of the high side MOSFET and drain of the low side MOSFET. 7 DRVH High side gate drive output. Connect to the gate of high side MOSFET. 8 BST Floating bootstrap supply pin for high side gate driver. Connect the bootstrap capacitor between this pin and the SW pin. 9 GND Bias and reference ground. All signals are referenced to this node.