2 Dual Bidirectional I C-bus and SMBus Voltage-Level Translator PCA9306 2 The PCA9306 is a dual bidirectional I C bus and SMBus voltagelevel translator with an enable (EN) input. www.onsemi.com Features MARKING DIAGRAMS 2bit Bidirectional Translator for SDA and SCL Lines in 2 MixedMode I CBus Applications 8 2 StandardMode, FastMode, and FastMode Plus I CBus and AAF TSSOP8 SMBus Compatible YWWA DT SUFFIX Less Than 1.5 ns Maximum Propagation Delay to Accommodate CASE 948AL 2 StandardMode and FastMode I CBus Devices and Multiple Masters 1 Allows Voltage Level Translation Between: 1.0 V V and 1.8 V, 2.5 V, 3.3 V or 5 V V ref(1) bias(ref)(2) 1.2 V V and 1.8 V, 2.5 V, 3.3 V or 5 V V ref(1) bias(ref)(2) US8 AK 1.8 V V and 3.3 V or 5 V V ref(1) bias(ref)(2) US SUFFIX ALYW 2.5 V V and 5 V V CASE 493 ref(1) bias(ref)(2) 3.3 V V and 5 V V ref(1) bias(ref)(2) Commercial Provides Bidirectional Voltage Translation With No Direction Pin Low 3.5 ONState Connection Between Input and Output Ports Provides Less Signal Distortion 2 AK M OpenDrain I CBus I/O Ports (SCL1, SDA1, SCL2 and SDA2) 2 5 V Tolerant I CBus I/O Ports to Support MixedMode Signal Operation HighImpedance SCL1, SDA1, SCL2 and SDA2 Pins for NLV Prefix EN = LOW UQFN8 1 LockUp Free Operation MU SUFFIX AQ M 8 CASE 523AN Flow Through Pinout for Ease of PrintedCircuit Board Trace 1 Routing Packages Offered: UDFN8 TSSOP8, US8, UQFN8, UDFN8 1.45 x 1.0 P M CASE 517BZ 1 ESD Performance: 4000 V Human Body Model, 400 V Machine Model NLV Prefix for Automotive and Other Applications Requiring AAF, AK, AQ, P = Specific Device Code Unique Site and Control Change Requirements AECQ100 A = Assembly Location Qualified and PPAP Capable L = Lot Code These are PbFree Devices Y = Year Code W, WW = Week Code M = Date Code = PbFree Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: October, 2020 Rev. 7 PCA9306/DPCA9306 Function Description bus. The PCA9306 has a standard opencollector 2 2 The PCA9306 is a dual bidirectional I Cbus and SMBus configuration of the I Cbus. The size of these pullup voltagelevel translator with an enable (EN) input, and is resistors depends on the system, but each side of the operational from 1.0 V to 3.6 V (V ) and 1.8 V to 5.5 V ref(1) translator must have a pullup resistor. The device is (V ). bias(ref)(2) designed to work with Standardmode, Fastmode and Fast 2 The PCA9306 allows bidirectional voltage translations mode Plus I Cbus devices in addition to SMBus devices. between 1.0 V and 5 V without the use of a direction pin. The The maximum frequency is dependent on the RC time low ONstate resistance (R ) of the switch allows constant, but generally supports > 2 MHz. on connections to be made with minimal propagation delay. When the SDA1 or SDA2 port is LOW, the clamp is in the When EN is HIGH, the translator switch is on, and the SCL1 ONstate and a low resistance connection exists between the and SDA1 I/O are connected to the SCL2 and SDA2 I/O, SDA1 and SDA2 ports. Assuming the higher voltage is on respectively, allowing bidirectional data flow between the SDA2 port, when the SDA2 port is HIGH, the voltage on ports. When EN is LOW, the translator switch is off, and a the SDA1 port is limited to the voltage set by VREF1. When highimpedance state exists between ports. the SDA1 port is HIGH, the SDA2 port is pulled to the drain The PCA9306 is not a bus buffer that provides both level pullup supply voltage (V ) by the pullup resistors. pu(D) translation and physical capacitance isolation to either side This functionality allows a seamless translation between of the bus when both sides are connected. The PCA9306 higher and lower voltages selected by the user without the only isolates both sides when the device is disabled and need for directional control. The SCL1/SCL2 channel also provides voltage level translation when active. functions as the SDA1/SDA2 channel. The PCA9306 can be used to run two buses, one at All channels have the same electrical characteristics and 400 kHz operating frequency and the other at 100 kHz there is minimal deviation from one output to another in operating frequency. If the two buses are operating at voltage or propagation delay. This is a benefit over discrete different frequencies, the 100 kHz bus must be isolated transistor voltage translation solutions, since the fabrication when the 400 kHz operation of the other bus is required. If of the switch is symmetrical. The translator provides the master is running at 400 kHz, the maximum system excellent ESD protection to lower voltage devices, and at the operating frequency may be less than 400 kHz because of same time protects less ESDresistant devices. the delays added by the translator. 2 As with the standard I Cbus system, pullup resistors are required to provide the logic HIGH levels on the translators FUNCTIONAL DIAGRAM Figure 1. Logic Diagram www.onsemi.com 2