Product Specification PE64907 UltraCMOS Digitally Tunable Capacitor (DTC) 100-3000 MHz Product Description Features PE64907 is a DuNE technology-enhanced Digitally 3-wire (SPI) compatible serial interface Tunable Capacitor (DTC) based on Peregrines UltraCMOS with built-in bias voltage generation and technology. This highly versatile product supports a wide ESD protection variety of tuning circuit topologies with emphasis on DuNE technology enhanced impedance matching and aperture tuning applications. 5-bit 32-state Digitally Tunable Capacitor PE64907 offers high RF power handling and ruggedness Shunt configuration C = 0.85 pF to 2.4 pF (2.82:1 tuning ratio) in discrete 50 fF while meeting challenging harmonic and linearity steps requirements enabled by Peregrines HaRP technology. High RF power handling (30 V RF) and The device is controlled through the widely supported 3-wire pk linearity (SPI compatible) interface. All decoding and biasing is Wide power supply range (2.3V to 4.8V) integrated on-chip and no external bypassing or filtering and low current consumption components are required. (typ. 140 A at 2.75V) High ESD tolerance of 2kV HBM on all DuNE devices feature ease of use while delivering pins superior RF performance in the form of tuning accuracy, Applications include: monotonicity, tuning ratio, power handling, size, and quality Tunable antennas factor. With built-in bias voltage generation and ESD Tunable matching networks protection, DTC products provide a monolithically integrated Tunable filter networks tuning solution for demanding RF applications. Phase shifters Figure 1. Functional Diagram Figure 2. Package Type 10-lead 2 x 2 x 0.55 mm QFN RF+ RF- ESD ESD CMOS Control Serial Interface Driver and ESD DOC-02169 Document No. DOC-30214-2 www.psemi.com 2013 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 10 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: PE64907 Product Specification Table 1. Electrical Specifications 25C, V = 2.75V (In shunt configuration, RF- connected to GND) DD Parameter Condition Min Typ Max Unit Operating frequency 100 3000 MHz Minimum capacitance State 00000, 100 MHz 0.77 0.85 0.94 pF (C ) min Maximum capacitance State 11111, 100 MHz 2.16 2.40 2.64 pF (C ) max Tuning ratio C /C , 100 MHz 2.82:1 max min Step size 5 bits (32 states), 100 MHz 0.050 pF 698 - 960 MHz, with L removed 1 41 S Quality factor at C min 1710 - 2170 MHz, with L removed 37 S 698 - 960 MHz, with L removed 34 1 S Quality Factor at C max 1710 - 2170 MHz, with L removed 16 S State 00000 8.3 Self resonant frequency GHz State 11111 3.5 2fo, 3fo: 698 - 915 MHz P +34 dBm, 50 -36 dBm 2 IN Harmonics 2fo, 3fo: 1710 - 1910 MHz P +32 dBm, 50 -36 dBm IN Bands I,II,V/VIII, +20 dBm CW TX freq, IMD3 -105 dBm -15 dBm CW 2Tx-Rx freq, 50 Third order intercept point Shunt configuration derived from IMD3 spec 65 dBm (IP3) IP3 = (2P + P - IMD3) / 2 TX block 3,4 Switching time State change to 10/90% delta capacitance between any two states 12 s 3 Start-up time Time from V within specification to all performances within specification 70 s DD 3,4 Wake-up time State change from Standby mode to RF state to all performances within specification 70 s Notes: 1. Q for a shunt DTC based on a series RLC equivalent circuit Q = X / R = (X - X ) / R, where X = X + X , X = 2*pi*f*L, X = -1 / (2*pi*f*C), which is equal to removing the effect of parasitic inductance L C L L C L C S 2. In shunt between 50 ports. Pulsed RF input with 4620 S period, 50% duty cycle, measured per 3GPP TS 45.005 3. DC path to ground at RF must be provided to achieve specified performance 4. State change activated on falling edge of SEN following data word 2013 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-30214-2 UltraCMOS RFIC Solutions Page 2 of 10 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: