Product Specification PE64909 UltraCMOS Digitally Tunable Capacitor (DTC) Product Description 100-3000 MHz PE64909 is a DuNE technology-enhanced Digitally Features Tunable Capacitor (DTC) based on Peregrines UltraCMOS technology. This highly versatile product supports a wide 3-wire (SPI compatible) serial interface with built-in bias voltage generation and variety of tuning circuit topologies with emphasis on ESD protection impedance matching and aperture tuning applications. DuNE technology enhanced PE64909 offers high RF power handling and ruggedness 4-bit 16-state Digitally Tunable Capacitor while meeting challenging harmonic and linearity Shunt configuration C = 0.6 pF to 2.35 pF requirements enabled by Peregrines HaRP technology. (3.9:1 tuning ratio) in discrete 117 fF steps The device is controlled through the widely supported 3-wire (SPI compatible) interface. All decoding and biasing is High RF power handling (30 V RF) and pk linearity integrated on-chip and no external bypassing or filtering components are required. Wide power supply range (2.3 to 4.8V) and low current consumption (typ. 140 A at 2.75V) DuNE devices feature ease of use while delivering High ESD tolerance of 2kV HBM superior RF performance in the form of tuning accuracy, on all pins monotonicity, tuning ratio, power handling, size, and quality Applications include: factor. With built-in bias voltage generation and ESD Tunable antennas protection, DTC products provide a monolithically integrated Tunable matching networks tuning solution for demanding RF applications. Tunable filter networks Phase shifters Figure 1. Functional Diagram Figure 2. Package Type 10-lead 2 x 2 x 0.55 mm QFN 71-0090-01 Document No. DOC-86359-1 www.psemi.com 2017 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 11 PE64909 Product Specification Table 1. Electrical Specifications 25 C, V = 2.75V (In shunt configuration, RF- connected to GND) DD Parameter Condition Min Typ Max Unit Operating frequency 100 3000 MHz Minimum capacitance State 0000, 100 MHz 0.54 0.60 0.66 pF (C ) min Maximum capacitance State 1111, 100 MHz 1.88 2.35 2.82 pF (C ) max Tuning ratio C /C , 100 MHz 3.9:1 max min Step size 4 bits (16 states), 100 MHz 0.117 pF 698 to 960 MHz, with L removed 40 S 1 Quality factor at C min 1710 to 2170 MHz, with L removed 40 S 698 to 960 MHz, with L removed 29 S 1 Quality factor at C max 1710 to 2170 MHz, with L removed 13 S State 0000 9.1 Self resonant frequency GHz State 1111 3.7 2fo, 3fo: 698 to 915 MHz P = +34 dBm, 50 -36 dBm IN 2 Harmonics 2fo, 3fo: 1710 to 1910 MHz P = +32 dBm, 50 -36 dBm IN Bands I,II,V/VIII, +20 dBm CW TX freq, IMD3 -105 dBm -15 dBm CW 2TX-RX freq, 50 Third order intercept point Shunt configuration derived from IMD3 spec 65 dBm (IP3) IP3 = (2P + P - IMD3) / 2 TX block 3,4 Switching time State change to 10/90% delta capacitance between any two states 12 s 3 Start-up time Time from V within specification to all performances within specification 70 s DD 3,4 Wake-up time State change from Standby mode to RF state to all performances within specification 70 s Notes: 1. Q for a Shunt DTC based on a Series RLC equivalent circuit Q = X /R = (X-X )/R, where X = X +X , X = 2*pi*f*L, X = -1/(2*pi*f*C), which is equal to removing the effect of parasitic inductance L C L L C L C S 2. In Shunt between 50 ports. Pulsed RF input with 4620 S period, 50% duty cycle, measured per 3GPP TS 45.005 3. DC path to ground at RF must be provided to achieve specified performance 4. State change activated on falling edge of SEN following data word 2017 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-86359-1 UltraCMOS RFIC Solutions Page 2 of 11