ACT88329 Advanced PMIC with 3 Bucks, 2 LDOs, and Load Bypass Switches BENEFITS and FEATURES GENERAL DESCRIPTION TM The ACT88329 PMIC is an integrated ActiveCiPS Wide input voltage range power management integrated circuit. It powers a wide Vin = 2.7V to 5.5V range of processors, including solid-state drive applica- Complete integrated power solution tions, video processors, FPGAs, wearables, periph- 4A DC/DC Step-Down (Buck) Regulator with By- erals, and microcontrollers. The ACT88329 is optimized pass Function for SSD and FPGA applications. A similar product, ACT88328, is optimized for video and wearables appli- 4A DC/DC Step-Down (Buck) cations. The ACT88329 is highly flexible and can be re- Regulator 2 configured via I C for multiple applications without the 2A DC/DC Step-Down (Buck) Regulator need for PCB changes. The low external component Two 300mA LDOs count and high configurability significantly speeds time Space Savings to market. Examples of configurable options include output voltage, startup time, slew rate, system level se- Fully integrated quencing, switching frequency, sleep modes, operating High Fsw = 1.125MHz to 3.3MHz modes etc. ACT88329 is programmed at the factory Works with 0.47H Inductor with a default configuration. These settings can be opti- Integrated sequencing 2 mized for a specific design through the I C interface. The ACT88329 is available in several default configura- Easy system level design tion. Contact the factory for specific default configura- Configurable Sequencing tions. Multiple Wake up Triggers with GPIOs Seamless Sequencing of External Supplies The core of the device includes three DC/DC step down converters using integrated power FETs, two low-drop- Seven Programmable GPIOs out regulators (LDOs). Buck1 and LDO1 can be config- Buck 1 Bypass Mode for 3.3V system level ured as a load switch. Buck1 is a peak current mode, compliance fixed frequency DC-DC step down converter that is op- timized for output voltage closes to the input voltage. Highly configurable Buck1 switches at either 1.125MHz or 2.25MHz, requir- uP interface for status reporting and controllability ing only three small components for operation. Buck2 Programmable Reset and Power Good GPIOs and Buck3 use an asynchronous constant on-time, Flexible Sequencing Options ACOT, control architecture to optimize the load transi- Multiple Sleep Modes ent response with smaller output capacitors. The LDOs only require small ceramic capacitors. All outputs are 2 I C Interface 1MHz 2 highly configurable via the I C interface. The ACT88329 PMIC is available in a 2.18 x 2.58 mm APPLICATIONS 30 ball WLCSP package. Solid-State Drives (SSD) FPGA Computer Vision Portable Audio / Video Datasheet Rev. A, September 23, 2020 Subject to change without notice 1 of 52 www.qorvo.com ACT88329 Advanced PMIC with 3 Bucks, 2 LDOs, and Load Bypass Switches TYPICAL APPLICATION DIAGRAM BUCK1 4A 2.7V ~ 5.5V Input BUCK2 4A BUCK3 2A ACT88329 SOC PG External LDO1 300mA DC/DC 1A Load Switch ENABLE LDO2 300mA SCL SDA GPIOs Datasheet Rev. A. September 23, 2020 Subject to change without notice 2 of 52 www.qorvo.com