DATASHEET SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTH ICS309 Description Features The ICS309 is a versatile serially-programmable, triple Packaged in 20-pin SSOP (QSOP) Pb-free, RoHS PLL with spread spectrum clock source. The ICS309 compliant can generate any frequency from 250kHz to 200 MHz, Highly accurate frequency generation and up to 6 different output frequencies simultaneously. M/N Multiplier PLL: M = 1..2048, N = 1..1024 The outputs can be reprogrammed on-the-fly, and will lock to a new frequency in 10 ms or less. Serially programmable: user determines the output frequency via a 3-wire interface To reduce system EMI emissions, spread spectrum is Spread Spectrum frequency modulation for reduced available that supports modulation frequencies of system EMI 31 kHz and 120 kHz, as well as modulation amplitudes of +/-0.25% to +/-2.0%. Both center and down-spread Center or Down Spread up to 4% total options are available. Selectable 32 kHz and 120 kHz modulation The device includes a PDTS pin which tri-states the Eliminates need for custom quartz oscillators output clocks and powers down the entire chip. Input crystal frequency of 5 - 27 MHz The ICS309 default for non-programmed start-up are Input clock frequency of 3 - 50 MHz buffered reference clock outputs on all clock output pins. Output clock frequencies up to 200 MHz TM IDTs VersaClock programming software allows the Operating voltage of 3.3 V user to configure up to 9 outputs with target Up to 9 reference clock outputs frequencies, spread spectrum capabilities or buffered TM Power down tri-state mode reference clock outputs. The VersaClock software automatically configures the PLLs for optimal overall Very low jitter performance. Block Diagram 3 VDD PLL1 with CLK1 Spread CLK2 STROBE Spectrum SCLK CLK3 Divide DATA CLK4 Logic PLL2 and CLK5 Output CLK6 Enable Crystal or Control clock input CLK7 PLL3 CLK8 X1/ICLK Crystal CLK9 Oscillator X2 GND 2 External capacitors are required with a crystal input. PDTS IDT SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTH 1 ICS309 REV L 091311ICS309 SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTH SER PROG CLOCK SYNTHESIZER Pin Assignment DATA 1 20 STROBE X2 2 19 SCLK X1/ICLK 3 18 PDTS CLK9 4 17 VDD VDD 5 16 VDD GND 6 15 GND CLK1 7 14 CLK5 CLK2 8 13 CLK6 CLK3 9 12 CLK7 CLK4 10 11 CLK8 20 pin (150 mil) SSOP (QSOP) Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 DATA Input Serial data input. 2 X2 XO Crystal Output. Connect this pin to a crystal. Float for clock input. 3 X1/ICLK XI Connect this pin to a crystal or external clock input. 4 CLK9 Output Output clock 9. Default of Reference frequency output when unprogrammed. 5 VDD Power Connect to +3.3V. 6 GND Power Connect to Ground. 7 CLK1 Output Output clock 1. Default of Reference frequency output when unprogrammed. 8 CLK2 Output Output clock 2. Default of Reference frequency output when unprogrammed. 9 CLK3 Output Output clock 3. Default of Reference frequency output when unprogrammed. 10 CLK4 Output Output clock 4. Default of Reference frequency output when unprogrammed. 11 CLK8 Output Output clock 8. Default of Reference frequency output when unprogrammed. 12 CLK7 Output Output clock 7. Default of Reference frequency output when unprogrammed. 13 CLK6 Output Output clock 6. Default of Reference frequency output when unprogrammed. 14 CLK5 Output Output clock 5. Default of Reference frequency output when unprogrammed. 15 GND Power Connect to Ground. 16 VDD Power Connect to +3.3 V. 17 VDD Power Connect to +3.3 V. 18 PDTS Input Powers down entire chip, tri-states all outputs when low. Internal pull-up. 19 SCLK Input Serial Shift register clock. See timing diagram. 20 STROBE Input Strobe to load data. See timing diagram. Use external 250 kOhm pull-up. IDT SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTH 2 ICS309 REV L 091311