DATASHEET QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER ICS348 Description Features The ICS348 field programmable clock synthesizer Packaged as 20-pin SSOP (QSOP) (Pb-free) generates up to 9 high-quality, high-frequency clock outputs Eight addressable registers including multiple reference clocks from a low frequency Replaces multiple crystals and oscillators crystal or clock input. The ICS348 has 4 independent on-chip PLLs and is designed to replace crystals and Output frequencies up to 200 MHz at 3.3V crystal oscillators in most electronic systems. Input crystal frequency of 5 to 27 MHz TM Using IDTs VersaClock software to configure PLLs and Input clock frequency of 2 to 50 MHz outputs, the ICS348 contains a One-Time Programmable Up to nine reference outputs (OTP) ROM to allow field programmability. Programming Up to two sets of four low-skew outputs features include eight selectable configuration registers, up to two sets of four low-skew outputs. Operating voltages of 3.3 V Using Phase-Locked Loop (PLL) techniques, the device Advanced, low power CMOS process runs from a standard fundamental mode, inexpensive For one output clock, use the ICS341 (8-pin). For two crystal, or clock. It can replace multiple crystals and output clocks, use the ICS342 (8-pin). For three output oscillators, saving board space and cost. clocks, use the ICS343 (8-pin). For more than three The ICS348 is also available in factory programmed custom outputs, use the ICS345 or ICS348. versions for high-volume applications. Block Diagram 3 VDD CLK1 PLL1 OTP S2:S0 CLK2 ROM 3 with CLK3 PLL PLL2 Divide Values CLK4 Logic and CLK5 Output PLL3 CLK6 Enable Crystal or Control CLK7 clock input PLL4 X1/ICLK CLK8 Crystal CLK9 Oscillator X2 GND 2 External capacitors are required with a crystal input. PDTS IDT QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER 1 ICS348 REV N 090613ICS348 QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER EPROM CLOCK SYNTHESIZER Pin Assignment X1/ICLK 1 20 X2 S0 2 19 VDD S1 3 18 PDTS CLK9 4 17 S2 VDD 5 16 VDD GND 6 15 GND CLK1 7 14 CLK5 CLK2 8 13 CLK6 CLK3 9 CLK7 12 CLK4 10 11 CLK8 20-pin (150 mil) SSOP (QSOP) Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 X1 XI Crystal Input. Connect this pin to a crystal or external input clock. 2 S0 Input Select pin 0. Internal pull-up resistor. 3 S1 Input Select pin 1. Internal pull-up resistor. 4 CLK9 Output Output clock 9. Weak internal pull-down when tri-state. Connect to +3.3 V. 5VDD Power 6 GND Power Connect to ground. 7 CLK1 Output Output clock 1. Weak internal pull-down when tri-state. 8 CLK2 Output Output clock 2. Weak internal pull-down when tri-state. 9 CLK3 Output Output clock 3. Weak internal pull-down when tri-state. 10 CLK4 Output Output clock 4. Weak internal pull-down when tri-state. 11 CLK8 Output Output clock 8. Weak internal pull-down when tri-state. 12 CLK7 Output Output clock 7. Weak internal pull-down when tri-state. 13 CLK6 Output Output clock 6. Weak internal pull-down when tri-state. 14 CLK5 Output Output clock 5. Weak internal pull-down when tri-state. 15 GND Power Connect to ground. Connect to +3.3 V. 16 VDD Power 17 S2 Input Select pin 2. Internal pull-up resistor. Power down tri-state. Powers down entire chip and tri-states clock outputs 18 PDTS Input when low. Internal pull-up resistor. Connect to +3.3 V. 19 VDD Power 20 X2 XO Crystal Output. Connect this pin to a fundamental crystal. Float for clock input. IDT QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER 2 ICS348 REV N 090613