5V41065PGGI8 Renesas

DATASHEET 2 OUTPUT PCIE GEN1/2 SYNTHESIZER IDT5V41065 Recommended Applications Features/Benefits 2 Output synthesizer for PCIe Gen1/2 and Ethernet 16-pin TSSOP and QFN packages small board footprint Spread-spectrum capable reduces EMI General Description Outputs can be terminated to LVDS can drive a wider variety of devices The IDT5V41065 is a PCIe Gen2 compliant spread 25 MHz, 125 MHz and 200 MHz output frequencies spectrum capable clock generator. The device has 2 TSSOP only differential HCSL outputs and can be used in communication or embedded systems to substantially 100MHz and 200MHz output frequencies VFQFPN reduce electro-magnetic interference (EMI). The spread package amount and output frequency are selectable via select pins. OE control pin greater system power management The IDT5V41065 can also supply 25 MHz, 125 MHz and Spread% and frequency pin selection no software 200 MHz outputs for applications such as Ethernet. required to configure device Industrial temperature range available supports Output Features demanding embedded applications 2 - 0.7V current mode differential HCSL output pairs For PCIe Gen3 applications, see the 5V41235 Key Specifications Cycle-to-cycle jitter < 100 ps Output-to-output skew < 50 ps PCIe Gen2 phase jitter < 3.0ps RMS Block Diagram VDD 2 SS1:SS0 CLK0 2 Control CLK0 Logic S1:S0 2 Phase Lock Loop CLK1 X1/ICLK Clock CLK1 Buffer/ 25 MHz Crystal crystal or clock Oscillator X2 2 Optional tuning crystal Rr(IREF) capacitors GND OE IDT 2 OUTPUT PCIE GEN1/2 SYNTHESIZER 1 IDT5V41065 APRIL 17, 2017IDT5V41065 2 OUTPUT PCIE GEN1/2 SYNTHESIZER Pin Assignment 1 16 VDDXD S0 S1 2 CLK0 15 16 15 14 13 SS0 3 14 CLK0 S1 1 12 GNDODA X1/ICLK 4 13 GNDODA SS0 2 11 VDDODA 5V41065 X1/CLK 3 10 CLK1 X2 5 12 VDDODA X2 4 9 CLK1 OE 6 CLK1 11 5 678 7 10 GNDXD CLK1 8 9 SS1 IREF 16-pin VFQFPN 16-pin (173 mil) TSSOP Output Select Table 1 (MHz)TSSOP only Output/Spread Select Table 3 - VFQFPN Only S1 S0 SS1 SS0 Output Spread% S1 S0 CLK(1:0), CLK(1:0) 00 00 100MHz -0.5 00 25M 00 01 200MHz -0.5 0 1 100M 0 0 1 0 100MHz No spread 1 0 125M 00 11 Reserved 1 1 200M 01 00 100MHz -1 01 01 200MHz -1 Spread Selection Table 2TSSOP only 01 10 Reserved SS1 SS0 Spread% 01 11 Reserved 00 No Spread 10 00 100MHz -1.5 0 1 Down -0.5 10 01 200MHz -1.5 1 0 Down -0.75 10 10 Reserved 11 No Spread 10 11 Reserved 11 00 Reserved 1 1 0 1 200MHz No spread 11 10 Reserved 11 11 Reserved IDT 2 OUTPUT PCIE GEN1/2 SYNTHESIZER 2 IDT5V41065 APRIL 17, 2017 OE S0 GNDXD VDDXD SS1 CLK0 IREF CLK0