Lower Power IDT71V256SA
3.3V CMOS Fast SRAM
256K (32K x 8-Bit)
Features Description
Ideal for high-performance processor secondary cache The IDT71V256SA is a 262,144-bit high-speed static RAM orga-
Commercial (0C to +70C) and Industrial (40C to +85C) nized as 32K x 8. It is fabricated using a high-performance, high-reliability
temperature range options CMOS technology.
Fast access times: The IDT71V256SA has outstanding low power characteristics while
Commercial and Industrial: 12/15/20ns at the same time maintaining very high performance. Address access
Low standby current (maximum): times of as fast as 12ns are ideal for 3.3V secondary cache in 3.3V
2mA full standby desktop designs.
Small packages for space-efficient layouts: When power management logic puts the IDT71V256SA in standby
28-pin 300 mil SOJ mode, its very low power characteristics contribute to extended battery life.
28-pin TSOP Type I By taking CS HIGH, the SRAM will automatically go to a low power standby
Produced with advanced high-performance CMOS mode and will remain in standby as long as CS remains HIGH. Further-
technology more, under full standby mode (CS at CMOS level, f=0), power consump-
Inputs and outputs are LVTTL-compatible tion is guaranteed to always be less than 6.6mW and typically will be much
Single 3.3V(0.3V) power supply smaller.
Green parts available, see ordering information The IDT71V256SA is packaged in a 28-pin 300 mil SOJ and a 28-pin
300 mil TSOP Type I.
Functional Block Diagram
A0
VCC
GND
262,144 BIT
ADDRESS
MEMORY ARRAY
DECODER
A14
I/O0
I/O CONTROL
INPUT
DATA
CIRCUIT
I/O7
,
CS
CONTROL
OE
CIRCUIT
3101 drw 01
WE
AUGUST 2015
1
DSC-3101/11
2015 Integrated Device Technology, Inc.IDT71V256SA
3.3V CMOS Static RAM 256K (32K x 8-Bit) Commercial and Industrial Temperature Ranges
(1)
Pin Configurations Truth Table
WE CS OE I/O Function
A14 1 28 VCC
X H X High-Z Standby (ISB)
A12 2 27
WE
A 7 3 26 A13
XVHC X High-Z Standby (ISB1)
4 25
A6 A8
A5 5 24 A9
H L H High-Z Output Disable
6 23
A4 A11
SO28 HL L DOUT Read
A3 7 22 OE
21
A2 8 A10
LL X DIN Write
A1 9 20 CS
10 19 I/O7
A0 3101 tbl 02
NOTE:
I/O0 11 18
I/O6
1. H = VIH, L = VIL, X = Dont Care
17
I/O1 12 I/O5
16
I/O2 13 I/O4
14 15
GND I/O3
(1)
Absolute Maximum Ratings
3101 drw 02
DIP/SOJ
Symbol Rating Com'l. Unit
Top View
VCC Supply Voltage -0.5 to +4.6 V
Relative to GND
22 21 A10
OE
23 20 CS (2)
A11
VTERM Terminal Voltage -0.5 to VCC+0.5 V
24 19 I/O7
A9
Relative to GND
25 18
A8 I/O6
A13 26 17 I/O5
o
TBIAS Temperature Under Bias -55 to +125 C
27 16
WE I/O4
15
VCC 28 I/O3
o
SO28
TSTG Storage Temperature -55 to +125 C
A14 1 14 GND
2 13
A12 I/O2
PT Power Dissipation 1.0 W
A7 3 12 I/O1
4 11
A6 I/O0
IOUT DC Output Current 50 mA
A5 5 10 A0
6 9
A4 A1
3101 tbl 03
8 NOTES:
A3 7 A2
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
3101 drw 03
may cause permanent damage to the device. This is a stress rating only and
TSOP
functional operation of the device at these or any other conditions above those
Top View
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2. Input, Output, and I/O terminals; 4.6V maximum.
Pin Descriptions
Name Description
Capacitance
A0 - A14 Addresses
(TA = +25C, f = 1.0MHz, SOJ package)
(1)
Symbol Parameter Conditions Max. Unit
I/O0 - I/O7 Data Input/Output
CIN Input Capacitance VIN = 3dV 6 pF
CS Chip Select
COUT Output Capacitance VOUT = 3dV 7 pF
WE Write Enable
3101 tbl 04
Output Enable NOTE:
OE
1. This parameter is determined by device characterization, but is not production
GND Ground
tested.
VCC Power
3101 tbl 01
Recommended Operating
Temperature and Supply Voltage
Grade Temperature GND Vcc
O O
Commercial 0 C to +70 C 0V 3.3V 0.3V
O O
Industrial -40 C to +85 C 0V 3.3V 0.3V
3101 tbl 05
2