FEMTOCLOCKS CRYSTAL-TO- ICS840001 LVCMOS/LVTTL CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS840001 is a Fibre Channel Clock Generator One LVCMOS/LVTTL output, 7 typical output impedence ICS TM and a member of the HiPerClocks family of high Crystal oscillator interface designed for 26.5625MHz, HiPerClockS performance devices from IDT. The ICS840001 uses 18pF parallel resonant crystal a 26.5625MHz crystal to synthesize either 106.25MHz or 212.5MHz, using the FREQ SEL pin. Selectable 106.25MHz or 212.5MHz output frequency The ICS840001 has excellent phase jitter performance, over the VCO range: 560MHz to 680MHz 637kHz 10MHz integration range. The ICS840001 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with RMS phase jitter 106.25MHz, using a 26.5625MHz crystal limited board space. (637kHz - 10MHz): 0.696ps (typical) RMS phase noise at 106.25MHz (typical) Phase noise: Offset Noise Power 100Hz ............... -94.4 dBc/Hz 1kHz ............. -119.9 dBc/Hz 10kHz ............. -130.2 dBc/Hz 100kHz ............. -131.5 dBc/Hz 3.3V operating supply -30C to 85C ambient operating temperature Available in both standard (RoHS 5) and lead-free (RoHS 6) packages FUNCTION TABLE Input Output Frequencies FREQ SEL 0)106.25MHz (Default 1z212.5MH Crystal: 26.5625MHz BLOCK DIAGRAM PIN ASSIGNMENT (Pullup) OE VDDA VDD 1 8 (Pulldown) FREQ SEL OE 2 7 Q0 XTAL OUT 3 6 GND XTAL IN 4 5 FREQ SEL 1 3 VCO XTAL IN ICS840001 Phase Q0 OSC Detector 637.5MHz w/ 8-Lead TSSOP XTAL OUT 26.5625MHz Ref. 6 0 4.40mm x 3.0mm x 0.925mm package body G Package M = 24 (fixed) Top View IDT / ICS LVCMOS/LVTTL CLOCK GENERATOR 1 ICS840001BG REV. A JUNE 13, 2007ICS840001 FEMTOCLOCKS CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR TABLE 1. PIN DESCRIPTIONS NeumberNeam Tnyp Descriptio 1VP.ower Analog supply pin DDA Output enable pin. When HIGH, Q0 output is enabled. 2EOtIpnpu Pullu When LOW, forces Q0 to Hi-Z state. LVCMOS/LVTTL interface levels. XTAL OUT, Crystal oscillator interface. XTAL IN is the input. 3, 4 Input XTAL IN XTAL OUT is the output. 5LFtREQ SEInnpuP.ulldow Frequency select pin. LVCMOS/LVTTL interface levels 6DGrNP.owe Power supply ground Single-ended clock output. LVCMOS/LVTTL interface levels. 70QtOutpu 7 typical output impedance. 8VP.ower Core supply pin DD NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS SrymbolPsaramete Tmest Condition MlinimuTmypicaMsaximu Unit C Input Capacitance 4Fp IN CPVower Dissipation Capacitance , V=43.465V 2Fp PD DD DDA R Input Pullup Resistor 5k1 PULLUP R Input Pulldown Resistor 5k1 PULLDOWN RO5utput Impedance 7 12 OUT TABLE 3. CONTROL FUNCTION TABLE Ctontrol Inputs Outpu O0E Q 0ZHi- 1eActiv IDT / ICS LVCMOS/LVTTL CLOCK GENERATOR 2 ICS840001BG REV. A JUNE 13, 2007