V SS V DD V DD V DD V SS VDD V S S VSS V DDA Crystal-to-HCSL, 100MHz PCI Express 841S101 Clock Synthesizer Datasheet General Description Features The 841S101 is a PLL-based clock synthesizer specifically designed One 0.7V current mode differential HCSL output pair for PCI Express Clock applications. This device generates a Crystal oscillator interface: 25MHz 100MHz differential HCSL clock from a input reference of 25MHz. Output frequency: 100MHz The input reference may be derived from an external source or by the RMS phase jitter 100MHz (12kHz 20MHz): 1.23ps (typical) addition of a 25MHz crystal to the on-chip crystal oscillator. An external reference is applied to the XTAL IN pin with the XTAL OUT Cycle-to-cycle jitter: 20ps (maximum) pin left floating.The device offers spread spectrum clock output for 2 I C support with readback capabilities up to 400kHz 2 reduced EMI applications. An I C bus interface is used to enable or Spread Spectrum for electromagnetic interference (EMI) reduction disable spread spectrum operation as well as select either a down 3.3V operating supply mode spread value of -0.35% or -.5%.The 841S101 is available in a lead-free 16-Lead TSSOP package. -40C to 85C ambient operating temperature Available in a lead-free (RoHS 6) package PCI Express Gen 1, 2 and 3 jitter compliant HiPerClockS Block Diagram Pin Assignment 1 16 25MHz XTAL IN Divider 2 15 SDATA SRCT0 OSC PLL Network SRCT0 3 14 SCLK SRCC0 XTAL OUT SRCC0 13 4 XTAL OUT 5 12 XTAL IN Pullup SDATA 6 11 2 I C IREF 10 Pullup 7 SCLK Logic 8 9 IREF 841S101 16-Lead TSSOP 4.4mm x 5.0mm x 0.925mm package body G Package Top View 2016 Integrated Device Technology, Inc. 1 Revision B, May 25, 2016841S101 Datasheet Pin Description and Pin Characteristic Tables Table 1. Pin Descriptions Number Name Type Description Power Power supply ground. 1, 6, 8, 10 V SS Power Power supply pins. 2, 5, 11, 16 V DD 3, 4 SRCT0, SRCC0 Output Differential output pair. HCSL interface levels. ) from this pin to ground provides a An external fixed precision resistor (475 7 IREF Input reference current used for differential current-mode SRCCx, SRCTx clock outputs. 9V Power Analog supply for PLL. DDA XTAL IN, 12, 13 Input Crystal oscillator interface. XTAL IN is the input. XTAL OUT is the output. XTAL OUT 2 I C compatible SCLK. This pin has an internal pullup resistor. Open drain. 14 SCLK Input Pullup LVCMOS/LVTTL interface levels. 2 I C compatible SDATA. This pin has an internal pullup resistor. 15 SDATA I/O Pullup LVCMOS/LVTTL interface levels. NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 2pF IN Input Pullup Resistor 51 k R PULLUP 2016 Integrated Device Technology, Inc. 2 Revision B, May 25, 2016