SEL1 XTAL OUT0 FemtoClock Crystal/LVCMOS-to-3.3V, 843001I-22 2.5V LVPECL Frequency Synthesizer DATA SHEET General Description Features The 843001I-22 is a a highly versatile, low phase noise One 3.3Vdifferential LVPECL output pair and one LVCMOS/LVTTL single-ended reference clock output LVPECL/LVCMOS Synthesizer which can generate low jitter reference clocks for a variety of communications applications and is Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input a member of the family of high performance clock solutions from IDT. The dual crystal interface allows the synthesizer to support up to two VCO range: 490MHz 640MHz communication standards in a given application (i.e. 1GB Ethernet Output frequency range: 49MHz 640MHz with a 25MHz crystal and 1Gb Fibre Channel using a 26.5625MHz Supports the following applications: crystal). The rms phase jitter performance is typically less than 1ps, SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV thus making the device acceptable for use in demanding RMS phase jitter 125MHz (1.875MHz - 20MHz): applications such as OC48 SONET and 10Gb Ethernet. The 0.50ps (typical) 843001I-22 is packaged in a small 24-pin TSSOP package. Full 3.3V or 2.5V supply mode -40C to 85C ambient operating temperature Control Input Function Table Available in lead-free (RoHS 6) package Input Outputs OE Q/nQ REF OUT Pin Assignment 0 High-Impedance High-Impedance REF OUT V 1 24 CCO LVCMOS N0 2 23 VEE 1 High-Impedance Active N1 3 22 OE N2 FLOAT Active High-Impedance 4 21 M2 V 5 20 M1 CCO LVPECL Q 6 19 M0 MR nQ 7 18 V 8 17 EE Block Diagram V 9 16 SEL0 CCA CLK V 10 15 CC 3 XTAL OUT1 11 14 XTAL IN0 N2:N0 XTAL IN1 12 13 Pulldown SEL0 843001I-22 Pulldown SEL1 24-Lead TSSOP N 4.4mm x 7.8mm x 0.925mm package body 000 1 XTAL IN0 001 2 G Package OSC 00 11 010 3 Top View Q XTAL OUT0 011 4 (default) 10 nQ 100 5 Phase 01 VCO XTAL IN1 101 6 Detector 00 490MHz-640MHz 01 OSC 110 8 111 10 XTAL OUT1 M Pulldown 000 18 CLK 10 001 22 010 24 011 25 100 32 (default) 101 40 Pulldown MR 3 M2:M0 REF CLK Pullup/Pulldown OE 843001I-22 Rev B 11/16/15 1 2015 Integrated Device Technology, Inc.843001I-22 DATA SHEET Table 1. Pin Descriptions Number Name Type Description 1V Power Output supply pin for REF CLK output. CCO LVCMOS 2, 3 N0, N1 Input Pullup Output divider select pins. Default 4. LVCMOS/LVTTL interface levels. See Table 3C. 4 N2 Input Pulldown 5V Power Output supply pin for LVPECL output. CCO LVPECL 6, 7 Q, nQ Output Differential output pair. LVPECL interface levels. 8, 23 V Power Negative supply pins. EE 9V Power Analog supply pin. CCA 10 V Power Core supply pin. CC 11, XTAL OUT1, Parallel resonant crystal interface. Input 12 XTAL IN1 XTAL OUT1 is the output, XTAL IN1 is the input. 13, XTAL OUT0, Parallel resonant crystal interface. Input 14 XTAL IN0 XTAL OUT0 is the output, XTAL IN0 is the input. 15 CLK Input Pulldown LVCMOS/LVTTL clock input. 16, 17 SEL0, SEL1 Input Pulldown Input MUX select pins. LVCMOS/LVTTL interface levels. See Table 3D. Active HIGH Master Reset. When logic HIGH, the internal dividers are reset causing the true output Q to go low and the inverted output nQ to go high. 18 MR Input Pulldown When logic LOW, the internal dividers and the outputs are enabled. LVCMOS/LVTTL interface levels. 19, 20 M0, M1 Input Pulldown Feedback divider select pins. Default value = 32. See Table 3B. LVCMOS/LVTTL interface levels. 21 M2 Input Pullup 3-State clock output enable, (High/Low/Float). See page 1, Control Input Function 22 OE Input Table. 24 REF OUT Output Reference clock output. LVCMOS/LVTTL interface levels. NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 4pF IN Input Pullup Resistor 51 k R PULLUP R Input Pulldown Resistor 51 k PULLDOWN R Output Impedance REF OUT 15 OUT Rev B 11/16/15 2 FEMTOCLOCK CRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER