843256 FemtoClock Crystal-to-3.3V LVPECL Frequency Synthesizer With/Integrated Fanout Buffer DATASHEET GENERAL DESCRIPTION FEATURES Six 3.3V differential LVPECL output pairs The 843256 is a Crystal-to-3.3V LVPECL Clock Synthesizer/Fanout Buffer designed for Fibre Channel and Gigabit Ethernet applications. Output frequency range: 62.5MHz to 625MHz The output frequency can be set using the frequency select pins and Crystal input frequency range: 15.625MHz to 25.5MHz a 25MHz crystal for Ethernet frequencies, or a 19.44MHz crystal for SONET. The low phase noise characteristics of the 843256 make it RMS phase jitter at 156.25MHz, using a 25MHz crystal an ideal clock for these demanding applications. (1.875MHz to 20MHz): 0.41ps (typical) 3.3V Operating supply modes: Core/Output 3.3V/3.3V 3.3V/2.5V 0C to 70C ambient operating temperature Available in lead-free (RoHS 6) package SELECT FUNCTION TABLE Inputs Function FB SEL N SEL1 N SEL0 M Divide N Divide M/N 00 025 1 25 0 0 1 25 2 12.5 0 1 0 25 4 6.25 01 125 5 5 10 032 1 32 10 132 2 16 11 032 4 8 11 132 8 4 Q0 PIN ASSIGNMENT BLOCK DIAGRAM nQ0 Pullup PLL BYPASS Q1 1 nQ1 N XTAL IN Output Q2 PLL OSC 0 Divider XTAL OUT nQ2 Q3 M Feedback nQ3 Divider 24-Lead TSSOP, E-Pad Pulldown 4.40mm x 7.8mm x 0.92mm Q4 FB SEL body package Pullup N SEL1 G Package nQ4 Top View Pullup N SEL0 Q5 nQ5 843256 REVISION B DECEMBER 18, 2014 1 2014 Integrated Device Technology, Inc.843256 DATA SHEET TABLE 1. PIN DESCRIPTIONS Number Name Type Description 1, 2 V Power Output supply pins. CCO 3, 4 nQ2, Q2 Output Differential output pair. LVPECL interface levels. 5, 6 nQ1, Q1 Output Differential output pair. LVPECL interface levels. 7, 8 nQ0, Q0 Output Differential output pair. LVPECL interface levels. Selects between the PLL and crystal inputs as the input to the dividers. 9 PLL BYPASS Input Pullup When LOW, selects PLL. When HIGH, selects XTAL IN, XTAL OUT. LVCMOS / LVTTL interface levels. 10 V Power Analog supply pin. CCA 11 V Power Core supply pin. CC 12 FB SEL Input Pulldown Feedback frequency select pin. LVCMOS/LVTTL interface levels. 13, XTAL IN, XTAL Crystal oscillator interface. XTAL IN is the input. Input 14 OUT XTAL OUT is the output. 15, N SEL0 Input Pullup Output frequency select pin. LVCMOS/LVTTL interface levels. 18 N SEL1 16, 17 V Negative supply pin. EE 19, 20 nQ5, Q5 Output Differential output pair. LVPECL interface levels. 21, 22 nQ4, Q4 Output Differential output pair. LVPECL interface levels. 23, 24 nQ3, Q3 Output Differential output pair. LVPECL interface levels. NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 4 pF IN R Input Pulldown Resistor 51 k PULLDOWN R Input Pullup Resistor 51 k PULLUP FemtoClock Crystal-to-3.3V LVPECL 2 REVISION B 12/18/14 Frequency Synthesizer With/Integrated Fanout Buffer