Integrated ICS9EPRS488 Circuit Datasheet Systems, Inc. TM System Clock for Embedded AMD based Systems Recommended Application: Key Specifications: CPU outputs cycle-to-cycle jitter < 150ps AMD M690T/780E systems SRC outputs cycle-to-cycle jitter < 125ps Output Features: SB SRC outputs cycle-to-cycle jitter < 125ps Integrated series resistors on all differential outputs. +/- 100ppm frequency accuracy on CPU, SRC, ATIG 1 - Greyhound compatible low-power CPU pair 0ppm frequency accuracy on 48MHz 6 - low-power differential SRC pairs 2 - low-power differential chipset SouthBridge SRC pairs Features/Benefits: 1 - Selectable low-power differential 100MHz non-spread Power Saving Features: SATA/ SRC output SB SRC SLOW input to throttle Chipset clocks 1 - Selectable low-power differential SRC / 27MHz Single (SB SRC) to 80% of normal. Ended output Optional Separate supply rail for SRC low Voltage I/O 1 - Selectable HT3 100MHz low-power differential - ~33% power saving when 1.5V is used for this rail hypertransport clock / HT66MHz Single Ended output Spread Spectrum for EMI reduction 2 - 48MHz USB clock Outputs may be disabled via SMBus 3 - 14.318MHz Reference clock External crystal load capacitors for maximum frequency 3 - low-power differential ATIG pairs accuracy 5- Dedicated CLKREQ pins Pin Configuration 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 SMBCLK 1 54 VDDCPU SMBDAT 2 53 VDDCPU IO VDD 3 52 GNDCPU SRC7C LPRS/27MHz NS 4 51 CLKREQ1 ** SRC7T LPRS/27MHz SS 5 50 CLKREQ2 ** GND 6 49 VDDA SRC5C LPRS 7 48 GNDA SRC5T LPRS 8 47 GNDSATA SRC4C LPRS 9 46 SRC6T/SATAT LPRS 9EPRS488 SRC4T LPRS 10 45 SRC6C/SATAC LPRS GNDSRC 11 44 VDDSATA VDDSRC IO 12 43 CLKREQ3 ** SRC3C LPRS 13 42 CLKREQ4 ** SRC3T LPRS 14 41 SB SRC SLOW * SRC2C LPRS 15 40 SB SRC0T LPRS SRC2T LPRS 16 39 SB SRC0C LPRS VDDSRC 17 38 VDDSB SRC VDDSRC IO 18 37 VDDSB SRC IO 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 * Internal 120Kohm Pull-Up Resistor ** Internal Pull-Down Resistor 161608/20/09 *Other names and brands may be claimed as the property of others. GNDSRC GND48 SRC1C LPRS 48MHz 0 SRC1T LPRS 48MHz 1 SRC0C LPRS VDD48 SRC0T LPRS X2 **CLKREQ0 X1 ATIG2C LPRS GNDREF ATIG2T LPRS REF0/SEL HTT66 GNDATIG REF1/SEL SATA VDDATIG IO REF2/SEL 27 VDDATIG VDDREF ATIG1C LPRS VDDHTT ATIG1T LPRS HTT0T LPRS/66M ATIG0C LPRS HTT0C LPRS/66M ATIG0T LPRS GNDHTT SB SRC1C LPRS PD SB SRC1T LPRS CPUKG0T LPRS GNDSB SRC CPUKG0C LPRSIntegrated ICS9EPRS488 Circuit Datasheet Systems, Inc. Pin Description PIN PIN NAME PIN TYPE DESCRIPTION 1 SMBCLK IN Clock pin of SMBus circuitry, 5V tolerant. 2 SMBDAT I/O Data pin for SMBus circuitry, 5V tolerant. 3 VDD PWR Power supply for SRC7/27MHz True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm 4 SRC7C LPRS/27MHz NS OUT series resistor needed)/27MHz 3.3V Single-ended non-spread output for discrete graphics Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 5 SRC7T LPRS/27MHz SS OUT ohm series resistor needed)/27MHz 3.3V Single-ended spreading output for discrete graphics 6 GND GND Ground pin for SRC7/27MHz Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 7 SRC5C LPRS OUT ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm 8 SRC5T LPRS OUT series resistor needed) Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 9 SRC4C LPRS OUT ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm 10 SRC4T LPRS OUT series resistor needed) 11 GNDSRC GND Ground pin for the SRC outputs 12 VDDSRC IO PWR Power supply for differential SRC outputs, nominal 1.05V to 3.3V Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 13 SRC3C LPRS OUT ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm 14 SRC3T LPRS OUT series resistor needed) Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 15 SRC2C LPRS OUT ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm 16 SRC2T LPRS OUT series resistor needed) 17 VDDSRC PWR Supply for SRC core, 3.3V nominal 18 VDDSRC IO PWR Power supply for differential SRC outputs, nominal 1.05V to 3.3V 19 GNDSRC GND Ground pin for the SRC outputs Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 20 SRC1C LPRS OUT ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm 21 SRC1T LPRS OUT series resistor needed) Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 22 SRC0C LPRS OUT ohm series resistor needed) True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm 23 SRC0T LPRS OUT series resistor needed) Clock Request pin for SRC0 outputs. If output is selected for control, then that output is controlled as 24 **CLKREQ0 IN follows: 0 = enabled, 1 = Low-Low Complementary clock of low-power differential push-pull PCI-Express pair with integrated series 25 ATIG2C LPRS OUT resistor. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low-power differential push-pull PCI-Express pair with integrated series resistor. (no 26 ATIG2T LPRS OUT 50ohm shunt resistor to GND and no 33 ohm series resistor needed) 27 GNDATIG GND Ground pin for the ATIG outputs 28 VDDATIG IO PWR Power supply for differential ATIG outputs, nominal 1.05V to 3.3V 29 VDDATIG PWR Power supply for ATIG core, nominal 3.3V Complementary clock of low-power differential push-pull PCI-Express pair with integrated series 30 ATIG1C LPRS OUT resistor. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low-power differential push-pull PCI-Express pair with integrated series resistor. (no 31 ATIG1T LPRS OUT 50ohm shunt resistor to GND and no 33 ohm series resistor needed) Complementary clock of low-power differential push-pull PCI-Express pair with integrated series 32 ATIG0C LPRS OUT resistor. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) True clock of low-power differential push-pull PCI-Express pair with integrated series resistor. (no 33 ATIG0T LPRS OUT 50ohm shunt resistor to GND and no 33 ohm series resistor needed) Complement clock of low power differential Chipset-to-Chipset SRC clock pair. (no 50ohm shunt resistor 34 SB SRC1C LPRS OUT to GND and no 33 ohm series resistor needed True clock of low power differential Chipset-to-Chipset SRC clock pair. (no 50ohm shunt resistor to GND 35 SB SRC1T LPRS OUT and no 33 ohm series resistor needed 36 GNDSB SRC GND Ground pin for the SB SRC outputs 161608/20/09 2