Integrated ICS9LPRS511 Circuit Advance Information Systems, Inc. Low Power Programmable Timing Control Hub for P4 processor Recommended Application: Features/Benefits: Low Power CK505 Programmable clock Programmable output frequencies Programmable output skew. Output Features: Programmable spread percentage for EMI control. 2 - 0.8V differential push-pull CPU pairs Programmable watch dog safe frequency. 1 - 25 MHz Supports tight ppm accuracy clocks for Serial-ATA 5 - PCI (33MHz) Supports spread spectrum modulation, 0.25% center 1 - USB, 48MHz spread. 1 - 24/48MHz Uses external 14.318MHz crystal, external crystal load 1 - REF, 14.318MHz caps are required for frequency tuning 8 - PCIEX 0.8V differential push-pull pairs Low Power differential outputs (50ohm resistor to GND 1 - PCIEX/DOT96MHz selectable pairs not needed) 1 - SATACLK differential pair Integrated 33 series resistor on all differential 1 - 24.576MHz output outputs Key Specifications: CPU outputs cycle-cycle jitter < 85ps PCIEX outputs cycle-cycle jitter < 125ps PCI outputs cycle-cycle jitter < 250ps +/- 300ppm frequency accuracy on CPU & PCIEX clocks Functionality Table Pin Configuration **RLATCH 1 64 25Mhz 0F 2x/Freerun* Bit4 Bit3 Bit2 Bit1 Bit0 CPU PCIEX PCI SATA GND 2 63 GND FSLC FSLB FSLA MHz MHz MHz MHz VDD 3 62 VDD25Mhz 0 0 0 0 0 266.66 100.00 33.33 100.00 **GSEL/24.576Mhz 4 61 VDDSATA 0 0 0 0 1 133.33 100.00 33.33 100.00 VDDPCI 5 60 SATACLKT LR 0 0 0 1 0 200.00 100.00 33.33 100.00 GND 6 59 SATACLKC LR 0 0 0 1 1 166.66 100.00 33.33 100.00 **DOC 1 7 58 GND 0 0 1 0 0 333.33 100.00 33.33 100.00 PCICLK0 8 57 REF0 2x/FSLC 0 0 1 0 1 100.00 100.00 33.33 100.00 PCICLK1 3x 9 56 GND 0 0 1 1 0 400.00 100.00 33.33 100.00 10 55 X1 FSLB/PCICLK2 2x 0 0 1 1 1 200.00 100.00 33.33 100.00 SELRSET/RESET /PCICLK3 11 54 X2 0 1 0 0 0 266.66 100.00 33.33 100.00 PCICLK412 53VDDREF 0 1 0 0 1 133.33 100.00 33.33 100.00 **DOC 0 13 52 SDATA 0 1 0 1 0 200.00 100.00 33.33 100.00 VDD48 14 51 SCLK 0 1 0 1 1 166.66 100.00 33.33 100.00 FSLA/USB 48MHz 15 50 GND 0 1 1 0 0 333.33 100.00 33.33 100.00 *SEL24 48 /24 48Mhz 16 49 CPUT LR0 0 1 1 0 1 100.00 100.00 33.33 100.00 GND 17 48 CPUC LR0 0 1 1 1 0 400.00 100.00 33.33 100.00 Vtt PwrGd/WOL STOP 18 47 VDDCPU 0 1 1 1 1 200.00 100.00 33.33 100.00 DOT96T LR/PCIeT LR0 19 46 CPUT LR1 1 0 0 0 0 269.33 101.00 33.66 100.00 DOT96C LR/PCIeC LR0 20 45 CPUC LR1 1 0 0 0 1 134.66 101.00 33.66 100.00 GND 21 44 VDDI/O 1 0 0 1 0 202.00 101.00 33.66 100.00 PCIeT LR122 43GNDA 1 0 0 1 1 168.33 101.00 33.66 100.00 PCIeC LR123 42VDDA 1 0 1 0 0 274.66 103.00 34.33 100.00 PCIeT LR2 24 41 PCIeT LR8 1 0 1 0 1 137.33 103.00 34.33 100.00 PCIeC LR2 25 40 PCIeC LR8 1 0 1 1 0 206.00 103.00 34.33 100.00 GND 26 39 PCIeT LR7 1 0 1 1 1 N/A N/A 34.33 100.00 PCIeT LR3 27 38 PCIeC LR7 1 1 0 0 0 279.99 105.00 35.00 100.00 PCIeC LR328 37GND 1 1 0 0 1 140.00 105.00 35.00 100.00 PCIeT LR4 29 36 PCIeT LR6 1 1 0 1 0 210.00 105.00 35.00 100.00 PCIeC LR4 30 35 PCIeC LR6 1 1 0 1 1 N/A N/A 35.00 100.00 GND 31 34 PCIeT LR5 1 1 1 0 0 285.33 107.00 35.66 100.00 VDDPCIEX 32 33 PCIeC LR5 1 1 1 0 1 142.66 107.00 35.66 100.00 1 1 1 1 0 214.00 107.00 35.66 100.00 64-Pin TSSOP 1 1 1 1 1 N/A N/A 35.66 100.00 * Internal Pull-Up Resistor ** Internal Pull-Down Resistor RESET pin is 3.3V tolerant 113709/05/08 ICS9LPRS511Integrated ICS9LPRS511 Circuit Advance Information Systems, Inc. Pin Description Pin Pin Name Type Pin Description Asynchronous input pin used in combination with VTTPWRGD signal to determine 1 **RLATCH IN whether to reset I2c. 2 GND PWR Ground pin. 3 VDD PWR Power supply, nominal 3.3V Latch input to select PCIEX0 and DOT96 output. GSEL = 1, selects DOT 96Mhz 4 **GSEL/24.576Mhz I/O GSEL = 0, selects PCIEX0. / 24.576Mhz clock output 5 VDDPCI PWR Power supply for PCI clocks, nominal 3.3V 6 GND PWR Ground pin. Dynamic Over Clocking pin: real time frequency selection 0: Normal 1: Frequency will 7 **DOC 1 IN transition to a preprogrammed value in the I2c. 8 PCICLK0 OUT PCI clock output. 9 PCICLK1 3x OUT Programmable 3x strength PCICLK, default 2x 3.3V tolerant input for CPU frequency selection. Low voltage threshold inputs, see 10 FSLB/PCICLK2 2x I/O input electrical characteristics for Vil FS and Vih FS values. / 3.3V PCI clock output. Latch select input pin. SELRSET = 0, selects PCICLK, SELRSET = 1 selects 11 SELRSET/RESET /PCICLK3 I/O RESET 12 PCICLK4 OUT PCI clock output. Dynamic Over Clocking pin: real time frequency selection 0: Normal 1: Frequency will 13 **DOC 0 IN transition to a preprogrammed value in the I2c. 14 VDD48 PWR Power pin for the 48MHz output.3.3V 3.3V tolerant input for CPU frequency selection. Refer to input electrical 15 FSLA/USB 48MHz I/O characteristics for Vil FS and Vih FS values. / Fixed 48MHz USB clock output. 3.3V. Latched select input for 24/48MHz output / 24/48MHz clock output. 1=24MHz, 0 = 16 *SEL24 48 /24 48Mhz I/O 48MHz. 17 GND PWR Ground pin. This active high 3.3V LVTTL input is a level sensitive strobe used to determine when 18 Vtt PwrGd/WOL STOP IN latch inputs are valid and are ready to be sampled / Asynchronous active low input pin that stops all outputs except free running 25Mhz True clock of differential pair for 96.00MHz non-spreading DOT clock/ True clock of 19 DOT96T LR/PCIeT LR0 OUT PCIEX0 Clock pair - selectable by GSEL both 0.75V differential pairs are 0.75V push- pull outputs with integrated 33ohm series resistor. Complementary clock of differential pair for 96.00MHz non-spreading DOT clock/ 20 DOT96C LR/PCIeC LR0 OUT Complementary clock of PCIEX0 Clock pair - selectable by GSEL both 0.75V differential pairs are 0.75V push-pull outputs with integrated 33ohm series resistor. 21 GND PWR Ground pin. True clock of 0.75V differential push-pull PCI Express pair with integrated 33ohm 22 PCIeT LR1 OUT series resistor Complement clock of 0.75V differential push-pull PCI Express pair with integrated 23 PCIeC LR1 OUT 33ohm series resistor True clock of 0.75V differential push-pull PCI Express pair with integrated 33ohm 24 PCIeT LR2 OUT series resistor Complement clock of 0.75V differential push-pull PCI Express pair with integrated 25 PCIeC LR2 OUT 33ohm series resistor 26 GND PWR Ground pin. True clock of 0.75V differential push-pull PCI Express pair with integrated 33ohm 27 PCIeT LR3 OUT series resistor Complement clock of 0.75V differential push-pull PCI Express pair with integrated 28 PCIeC LR3 OUT 33ohm series resistor True clock of 0.75V differential push-pull PCI Express pair with integrated 33ohm 29 PCIeT LR4 OUT series resistor Complement clock of 0.75V differential push-pull PCI Express pair with integrated 30 PCIeC LR4 OUT 33ohm series resistor 31 GND PWR Ground pin. 32 VDDPCIEX PWR Power supply for PCI Express clocks, nominal 3.3V 113709/05/08 2