HIP1011A Data Sheet November 16, 2004 FN4631.5 PCI Hot Plug Controller Features The HIP1011A is the second PCI Hot Plug Voltage bus Adjustable Delay Time for Turn-Off and Fault Reporting control IC from Intersil. A drop-in alternative to the widely Controls All PCI Supplies: +5V, +3.3V, +12V, -12V used HIP1011, the HIP1011A has the same form, fit and Internal MOSFET Switches for +12V and -12V Outputs function but additionally features an adjustable latch-off time of the MOSFET switches and fault reporting. P Interface for On/Off Control and Fault Reporting Like the HIP1011, the HIP1011A creates a small and simple Adjustable Overcurrent Protection for All Supplies yet complete power control solution with discrete power Provides Fault Isolation MOSFETs and a few passive components. Four independent supplies are controlled, +5V, +3.3, +12V, and Adjustable Turn-On Slew Rate -12V. The +12V and -12V switches are integrated. For the Minimum Parts Count Solution +5V and +3.3V supplies, overcurrent (OC) protection is No Charge Pump provided by sensing the voltage across external current- sense resistors. For the +12V and -12V supplies OC Pb-Free Available (RoHS Compliant) protection is provided internally. In addition, an on-chip reference is used to monitor the +5V, +3.3V and +12V Applications outputs for undervoltage (UV) conditions. The PWRON input PCI Hot Plug controls the state of the switches. During an OC condition on any output, or a UV condition on the +5V, +3.3V or +12V CompactPCI outputs, a LOW (0V) is asserted on the FLTN output and all MOSFETs are latched-off. The time to FLTN signal going Ordering Information LOW and MOSFET latch-off is determined by a single TEMP. RANGE PKG. capacitor from the FLTN pin to ground. This added feature o PART NUMBER ( C) PACKAGE DWG. allows the system OS to complete housekeeping activities in HIP1011ACB 0 to 70 16 Ld SOIC M16.15 preparation for an unplanned shut down of the affected card. The FLTN latch is cleared when the PWRON input is toggled HIP1011ACBZA 0 to 70 16 Ld SOIC M16.15 low again. During initial power-up of the main VCC supply (See Note) (Pb-free) (+12V), the PWRON input is inhibited from turning on the HIP1011ACB-T 0 to 70 Tape and Reel switches, and the latch is held in the Reset state until the HIP1011ACBZA-T 0 to 70 Tape and Reel (Pb-free) VCC input is greater than 10V. (See Note) User programmability of the overcurrent threshold, fault NOTE: Intersil Pb-free products employ special Pb-free material sets reporting response time, latch-off response time and turn-on molding compounds/die attach materials and 100% matte tin plate slew rate is provided. A resistor connected to the OCSET pin termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products programs the OC threshold. A capacitor may be added to the are MSL classified at Pb-free peak reflow temperatures that meet or FLTN pin to adjust both the delay time to reporting a fault exceed the Pb-free requirements of IPC/JEDEC J STD-020C. and the latch-off of the supplies after an OC or UV event. Capacitors connected to the gate pins set the turn-on rate. In Pinout addition the HIP1011A has also been enhanced to tolerate HIP1011A spurious system noise. (SOIC) TOP VIEW M12VIN 1 16 M12VO FLTN 2 15 M12VG 3V5VG 3 14 12VG V 4 13 GND CC 12VIN 5 12 12VO 3VISEN 6 11 5VISEN 3VS 7 10 5VS OCSET 8 9 PWRON CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 321-724-7143 Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2000, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.HIP1011A Typical Application 3.3V, 12V, -12V, 5V, 7.6A OUT 0.5A OUT 0.1A OUT 5A OUT 5V INPUT 3.3V INPUT 5m, 1% 5m, 1% ITF86130SK8T ITF86130SK8T HIP1011A -12V INPUT 0.033F M12VIN M12VO FLTN M12VG 0.033F 3V5VG 12VG V GND 0.033F 12V INPUT CC 12VIN 12VO 3VISEN 5VISEN 3VS 5VS OCSET PWRON 6.04k (OPTIONAL) 1% POWER CONTROL INPUT FAULT OUTPUT (ACTIVE LOW) NOTE: All capacitors are 10%. Simplified Schematic 5VREF SET (LOW = FAULT) FAULT LATCH LOW = FAULT FLTN COMP - 4.6V + INHIBIT COMP - RESET V CC 2.9V + V INHIBIT CC V CC COMP - 10.8V 5VREF + 5V ZENER V /17 REFERENCE OCSET INHIBIT COMP 5VS + - V CC V CC 3V5VG LOW WHEN V < 10V 12VIN CC V /13.3 OCSET POWER-ON 5VISEN RESET COMP 3VS + - 3VISEN 12VIN V /0.8 COMP OCSET V 0.3 CC - + V CC 100A V OCSET 12VG OCSET HIGH = FAULT V CC 12VO HIGH = SWITCHES ON 0.7 M12VIN PWRON V /3.3 COMP OCSET - + M12VG GND M12VIN M12VO FN4631.5 2 November 16, 2004 - - + + - + - +