Datasheet HIP2103, HIP2104 60V, 1A/2A Peak, Half-Bridge Driver with 4V UVLO The HIP2103 and HIP2104 are half-bridge drivers Features designed for applications using DC motors, 3-phase 60V maximum bootstrap supply voltage brushless DC motors, or other similar loads. 3.3V and 12V LDOs with dedicated enable pins The two inputs (HI and LI) independently control the (HIP2104) high-side driver (HO) and the low-side driver (LO). HI 5A sleep mode quiescent current and LI can be configured to enable/disable the device, which lowers the number of connections to a V undervoltage lockout DD microcontroller and the cost. 3.3V or 5V CMOS compatible inputs with hysteresis The low I bias current in the Sleep Mode prevents DD Integrated bootstrap FET (replaces traditional boot battery drain when the device is not in use, which strap diode) eliminates the need for an external switch to HIP2103 is available in 8 Ld SOIC and 3x3mm disconnect the driver from the battery. TDFN packages Integrated pull-down resistors on all of the inputs (LI, HIP2104 is available in a 4x4mm, 12 Ld DFN HI, VDen, and VCen) reduce the need for external package resistors. An active low resistance pull-down on the LO output ensures that the low-side bridge FET Pb-Free (RoHS Compliant) remains off during the Sleep Mode or when V is DD below the Undervoltage Lockout (UVLO) threshold. Applications The HIP2104 has a 12V linear regulator and a 3.3V Half-bridge, full bridge, and BLDC motor drives linear regulator with separate enable pins. The 12V (see Figures 3, 4, 5) regulator provides internal bias for V and the 3.3V DD UPS and inverters regulator provides bias for an external microcontroller Class-D amplifiers (and/or other low voltage ICs), which eliminates the need for discrete LDOs or DC/DC converters. Any switch mode power circuit requiring a half-bridge driver VBAT VBAT 5.5 VBAT VDen VCen 5.0 VCC HB HB VDD VDD 4.5 VDD HO HO 4.0 HI HI HIP2104 HIP2103 HS HS LI DC LI Motor 3.5 Controller LO LO 3.0 VSS VSS 2.5 VCen = VDen = 0 EPAD EPAD 2.0 50 10 20 30 40 V (VDC) BAT Figure 2. HIP2104 Shutdown Current vs V Figure 1. Typical Full Bridge Application BAT FN8276 Rev.2.0 Page 1 of 30 Feb 25, 2021 2013 Renesas Electronics I (A) BATHIP2103, HIP2104 Contents 1. Overview . 3 1.1 Typical Applications 3 1.2 Block Diagram 5 1.3 Ordering Information . 6 2. Pin Information 7 2.1 Pin Assignments 7 2.2 Pin Descriptions . 7 3. Specifications . 8 3.1 Absolute Maximum Ratings 8 3.2 Thermal Information 8 3.3 Recommended Operating Conditions 9 3.4 DC Electrical Specifications 9 3.5 AC Electrical Specifications . 11 3.6 Timing Diagrams . 13 4. Typical Perfomance Graphs 15 5. Functional Description 18 5.1 HIP2104 LDOs . 18 5.2 Input Signals 19 5.3 Sleep Mode . 19 5.4 Selecting the Boot Capacitor Value . 19 6. Application Examples . 21 6.1 Transients on the HS Node . 21 7. General PCB Layout Guidelines . 25 8. General EPAD Heatsinking Considerations . 26 9. Revision History 27 10. Package Outline Drawings . 28 FN8276 Rev.2.0 Page 2 of 30 Feb 25, 2021