ISL12029, ISL12029A Data Sheet December 16, 2010 FN6206.10 2 Real Time Clock/Calendar with I C Bus Features and EEPROM Real Time Clock/Calendar The ISL12029 device is a low power real time clock with - Tracks Time in Hours, Minutes and Seconds clock/calendar, power-fail indicator, clock output and crystal - Day of the Week, Day, Month and Year compensation, two periodic or polled alarms (open drain - 3 Selectable Frequency Outputs output), intelligent battery backup switching, CPU Two Non-Volatile Alarms Supervisor, integrated 512x8-bit EEPROM configured in 16 - Settable on the Second, Minute, Hour, Day of the Week, bytes per page. Day or Month The oscillator uses an external, low-cost 32.768kHz crystal. - Repeat Mode (periodic interrupts) The real-time clock tracks time with separate registers for Automatic Backup to Battery or SuperCap hours, minutes and seconds. The device has calendar - Power Failure Detection registers for date, month, year and day of the week. The - 800nA Battery Supply Current calendar is accurate through 2099, with automatic leap year correction. On-Chip Oscillator Compensation: - Internal Feedback Resistor and Compensation The ISL12029 and ISL12029A Power Control Settings are Capacitors different. The ISL12029 uses the Legacy Mode Setting, and - 64 Position Digitally Controlled Trim Capacitor the ISL12029A uses the Standard Mode Setting. - 6 Digital Frequency Adjustment Settings to 30ppm Applications that have V > V will require only the BAT DD ISL12029A. Please refer to Power Control Operation on 512x8 Bits of EEPROM 2 page 14 for more details. Also, please refer to I C - 16-Byte Page Write Mode (32 total pages) Communications During Battery Backup on page 24 for - 8 Modes of BlockLock Protection important details. - Single Byte Write Capability - Data Retention: 50 years Pinout - Endurance: >2,000,000 Cycles Per Byte ISL12029, ISL12029A (14 LD TSSOP, SOIC) CPU Supervisor Functions TOP VIEW - Power-On Reset, Low Voltage Sense - Watchdog Timer (0.25s, 0.75s, 1.5s) X1 1 14 V DD 2 X2 2 13 V I C Interface BAT NC 3 12 IRQ/F OUT - 400kHz Data Transfer Rate NC 4 11 NC NC 5 10 NC 14 Ld SOIC and 14 Ld TSSOP Packages RESET 6 9 SCL Pb-Free (RoHS Compliant) GND 7 8 SDA Applications NC = No internal connection Utility Meters HVAC Equipment Audio/Video Components Modems Network Routers, Hubs, Switches, Bridges Cellular Infrastructure Equipment Fixed Broadband Wireless Equipment Pagers/PDA POS Equipment Test Meters/Fixtures Office Automation (Copiers, Fax) Home Appliances Computer Products Other Industrial/Medical/AutomotivePAR CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. 2 I C Bus is a trademark owned by NXP Semiconductors Netherlands, B.V. BlockLock is a trademark of Intersil Corporation or one of its subsidiaries. Copyright Intersil Americas Inc. 2005, 2006, 2008, 2010. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.ISL12029, ISL12029A Block Diagram OSC COMPENSATION X1 TIMER TIME BATTERY V FREQUENCY DD 1Hz 32.768kHZ SWITCH CALENDAR KEEPING OSCILLATOR DIVIDER CIRCUITRY V REGISTERS BACK X2 LOGIC (SRAM) IRQ/F SELECT OUT STATUS CONTROL/ CONTROL SCL COMPARE SERIAL REGISTERS REGISTERS ALARM DECODE INTERFACE (EEPROM) LOGIC (SRAM) DECODER ALARM REGS SDA (EEPROM) 8 4k EEPROM WATCHDOG LOW VOLTAGE ARRAY TIMER RESET RESET Pin Descriptions PIN NUMBER SYMBOL DESCRIPTION 1 X1 The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external 32.768kHz quartz crystal. 2 X2 The X2 pin is the output of an inverting amplifier and is intended to be connected to one pin of an external 32.768kHz quartz crystal. 6 RESET RESET. This is a reset signal output. This signal notifies a host processor that the Watchdog time period has expired or that the voltage has dropped below a fixed V threshold. It is an open drain active LOW output. TRIP Recommended value for the pull-up resistor is 5k. If unused, connect to ground. 7 GND Ground. 8 SDA Serial Data (SDA) is a bidirectional pin used to transfer serial data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. 9 SCL The Serial Clock (SCL) input is used to clock all serial data into and out of the device. The input buffer on this pin is always active (not gated). 12 IRQ/F Interrupt Output/Frequency Output is a multi-functional pin that can be used as interrupt or frequency output pin. It OUT is an open drain output. The function is set via the configuration register. 13 V This input provides a backup supply voltage to the device. V supplies power to the device in the event that the BAT BAT V supply fails. This pin should be tied to ground if not used. DD 14 V Power Supply. DD 3, 4, 5, 10, NC No Internal Connection. 11 FN6206.10 2 December 16, 2010 MASK